Flash Memory; Board Control Flash; User Fpga Flash; Health Monitoring - Alpha Data ADM-XRC-5T2-ADV User Manual

4.2.

Flash Memory

The ADM-XRC-5T2-ADV is fitted with two separate Flash memories: one connected to the
Bridge / Control FPGA and the other to the User FPGA.

4.2.1. Board Control Flash

An Intel PC28F256P30 flash memory is used for storing a configuration bitstream for the User
FPGA. Once the Bridge / Control FPGA is configured, it checks for a valid bitstream in flash
and if present, automatically loads it into the User FPGA. This process can be inhibited by
setting a jumper on the JTAG connector. See the description of the "FBS" signal in Section
4.4 for further information.
Access to this flash device is only possible through control logic registers. The flash is not
directly mapped onto the local bus.
Programming, erasing and verification of the flash are supported by the ADM-XRC SDK and
driver. Utilities are provided to load bitstreams into the flash. These also verify the bitstream
is compatible with the target FPGA.

4.2.2. User FPGA Flash

An ST M25P32 flash memory with SPI interface is connected to the User FPGA for the
storage of application-specific information.
4.3.

Health Monitoring

The ADM-XRC-5T2-ADV has the ability to monitor temperature and voltage of key parts of
the board to maintain a check on the operation of the board. The monitoring is implemented
by a National Semiconductor LM87 and is supported by the board control logic connected
2
using I C.
The Control Logic scans the LM87 when instructed by host software and stores the current
voltage and temperature measurements in a blockram. This allows the values to be read
without the need to communicate directly with the monitor.
The following supplies and temperatures, as shown in Table 2, are monitored.
Monitor
1.0V
1.2V
1.5V
1.8V
2.5V
3.3V
5.0V
Pn4_VCCIO
Temp1
Temp2
ADM-XRC-5T2-ADV User Manual
Version 1.0
Page 5
Purpose
User FPGA Core Supply
Bridge FPGA Core Supply
SRAM and ADV212 Core Supply
Memories, User FPGA Memory I/O,
Local Bus I/O
Config CPLD Core Supply
Source voltage for Front, Rear I/O
Board Input Supply
Board Input Supply
Either 2.5V or 3.3V Rear (Pn4) I/O Voltage
User FPGA die temperature
LM87 on die temperature for board/ambient

Table 2 Voltage and Temperature Monitors

ADM-XRC-5T2-ADV User Manual