Jpeg Processor Interface Pin Locations - Alpha Data ADM-XRC-5T2-ADV User Manual

Individual signals to each ADV212 codec
ack_l
cs_l
dack_l<0> to <1>
dreq_l<0> to <1>
irq_l
rd_l
we_l
vdat<0> to <11>
scom4

4.10.2. JPEG Processor Interface Pin Locations

Bank Signals
adv_addr<0>
adv_addr<1>
adv_addr<2>
adv_addr<3>
adv_mclk
vclk
field
hsync
vsync
jpeg_reset_l
scomm5
adv_hdata<0>
adv_hdata<1>
adv_hdata<2>
adv_hdata<3>
adv_hdata<4>
adv_hdata<5>
adv_hdata<6>
adv_hdata<7>
adv_hdata<8>
adv_hdata<9>
adv_hdata<10>
adv_hdata<11>
adv_hdata<12>
adv_hdata<13>
adv_hdata<14>
adv_hdata<15>
adv_hdata<16>
adv_hdata<17>
adv_hdata<18>
adv_hdata<19>
adv_hdata<20>
adv_hdata<21>
adv_hdata<22>
adv_hdata<23>
adv_hdata<24>
adv_hdata<25>
adv_hdata<26>
adv_hdata<27>
adv_hdata<28>
adv_hdata<29>
adv_hdata<30>
adv_hdata<31>
ADM-XRC-5T2-ADV User Manual
Version 1.0
Page 15
- ADV212 acknowledge signal
- ADV212 chip select signal
- ADV212 DMA acknowledge signals
- ADV212 DMA request signals
- ADV212 interrupt request signal
- ADV212 read enable for host interface operation
- ADV212 write enable for host interface operation
- ADV212 video data bus
- ADV212
LCODE Output in Encode Mode
Bank 1 (A & B)
W35
M41
AA34
Y34
T37
Y42
F41
E40
F40
L42
AF42
AA39
AA41
AA40
AA37
AL42
AD42
Y39
Y40
AB41
Y38
W40
AB42
W38
V39
AD38
Y37
U38
T41
AE40
P38
N41
W37
R39
L40
M42
M39
K38
L39
L41
M38
G39
K39
ADM-XRC-5T2-ADV User Manual
Bank 2 (C & D)
AJ38
AJ37
AH40
AH38
AJ42
AK8
AT5
AG12
AG9
AN41
AF37
AR40
AT40
AB34
AP40
AC34
AC35
AN40
AN39
AD35
AM39
AM38
AF39
AL41
AL39
AD36
AK38
AK37
AG37
AP42
AG38
AC41
AC36
AB38
AF40
AE38
AR42
AP38
AE39
AD40
AT42
AU42
AD37