Summary Of Errata - Intel SL3VS - Celeron 633 MHz Processor Specification

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INTEL CELERON® PROCESSOR SPECIFICATION UPDATE
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AC = Intel Celeron® Processor in 478 Pin Package
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AD = Intel Celeron® D processor on 65 nm process
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AE = Intel Core™ Duo Processor and Intel
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AF = Dual-Core Intel Xeon processor LV
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AG = Dual-Core Intel Xeon Processor 5100 Series
AH = Intel® Core™2 Duo/Solo Processor for Intel® Centrino® Duo Processor
Technology
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AI = Intel Core™2 Extreme Processor X6800
Δ
E4000 Sequence
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AJ = Quad-Core Intel Xeon Processor 5300 Series
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AK = Intel Core™2 Extreme quad-core processor QX6700
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AL = Dual-Core Intel Xeon Processor 7100 Series
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AN = Intel Pentium Dual-Core Processor
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AO = Quad-Core Intel Xeon processor 3200 series
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AP = Dual-Core Intel Xeon Processor 3000 Series
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AQ = Intel Pentium Dual-Core Desktop Processor E2000
AR = Intel® Celeron processor 500 series
AS = Intel® Xeon® processor 7200, 7300 series
NO.
650h 651h 660h
A0 A1 A0
C1 X X X
C2 X X X
C3 X X X
C4 X X X
C5 X X X
C6 X X X
C7 X X X
C8 X X X
C9 X X X
C10 X X X
12
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Core™ Solo processor on 65 nm process
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and Intel Core™2 Duo Desktop Processor E6000
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and Intel
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Sequence

Summary of Errata

CPUID/Stepping
665h 683h 686h 68Ah
B0 B0 C0 D0
X X X X
X X X X
X X X X
X X X X
X X X X
X X X X
X X X X
X X X X
X X X X
X X X X
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Core™2 Quad processor Q6600
Plans
6B1h 6B4h
A1 B1
FP Data Operand Pointer
X X NoFix
may be incorrectly calculated
after FP access which wraps
64-Kbyte boundary in 16-bit
code
X X NoFix Differences exist in debug
exception reporting
X X NoFix Code fetch matching
disabled debug register may
cause debug exception
X X NoFix FP inexact-result exception
flag may not be set
X X NoFix BTM for SMI will contain
incorrect FROM EIP
X X NoFix I/O restart in SMM may fail
after simultaneous MCE
X X NoFix Branch traps do not function
if BTMs are also enabled
X X NoFix Machine check exception
handler may not always
execute successfully
X X NoFix LBER may be corrupted after
some events
X X NoFix BTMs may be corrupted
during simultaneous L1
Δ
and
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ERRATA