Features - Xilinx MicroBlaze User Manual

Features:

Features:
•
•
•
•
•
Note: Interrupts are not used in this design. For an example on how to use interrupts, see
the Microblaze design using an OPB interrupt controller and an OPB microprocessor
debug module (MDM) reference design available on the Embedded Design Kit web site at
http://www.support.xilinx.com/ise/embedded/edk_examples.htm
For documentation on interrupts, see the MicroBlaze Processor Reference Guide in the EDK
documentation.
MicroBlaze Microcontroller Ref Des User Guide
UG133 January 7, 2005
MicroBlaze Microprocessor
♦
50 MHz on the Spartan-3 Starter Kit Board, derived from the 50 MHz crystal on
board
♦
Instruction cache and data cache options disabled
♦
32 32-bit general purpose registers with 32-bit address and 32-bit data buses
♦
Single cycle execution
♦
Direct access to the register file using Fast Simplex Link (FSL)
Unified instruction and data BRAM into single memory for both instruction and data
segments
♦
Dual port 16 KB internal blockRAM memory structure
♦
2-cycle read access from BRAM via the Local Memory Bus (LMB)
RS232 UART Controller
♦
Pre-configured for 57600 baud rate
General purpose input/output ports (GPIO)
♦
8-bit GPIO configured as output ports to drive LED
♦
12-bit GPIO configured as output ports to drive the 7-segment LEDs on the board
♦
8-bit GPIO configured as input ports to read onboard dip switches
♦
3-bit GPIO configured as input ports to read push buttons
JTAG_UART core with Xilinx Microprocessor Debugger (XMD) and GDB debugger to
provide application/software debugging capabilities
♦
XMD uses a JTAG_UART to communicate with xmdstub on the board
♦
xmdstub is an executable software loaded into local system memory at startup
♦
Supports run time control, such as Run, Single Step, Breakpoint, View Registers,
and View Memory, as well as debug parameters
www.xilinx.com
R
3