AOpen AP53 User Manual page 49

Memory Hole
This option lets you assign the system memory area to avoid memory conflicts.
The settings are 512~640K, 15~16M
8-bit I/O Recovery Time (Sysclk)
This parameter allows you to set the response time of the 8-bit I/O devices
connected to your system. The settings range from
Disabled .
16-bit I/O Recovery Time (Sysclk)
This parameter allows you to set the response time of the 16-bit I/O devices
connected to your system. The settings range from
Disabled
.
DRAM Timing
The selections for this parameter are
60 ns
you select either
become nonconfigurable since BIOS automatically sets the values. Select
Manual
if you want to specify your own parameter settings.
This option lets you specify the DRAM refresh rate. The selections are
MHz, 60 MHz, 66 MHz,
This option specifies the system bus clock divisor. The selections are
PCICLK/4 PCICLK/3
and
When enabled, the BIOS skips the first input register in the DRAM when
reading data and therefore, speeds up the data read timings. Disable the option
to bypass the feature.
This parameter adjusts the read wait state between L2 and DRAM cache.
Everytime the CPU reads L2 cache miss, it reads four continuous memory
60 ns, 70 ns,
70 ns
or , the DRAM Timing subparameters
DRAM REFRESH RATE
and Reserved
ISA CLOCK DIVISOR
.
TURBO READ LEAD OFF
DRAM READ BURST TIMING
AMI BIOS Utility
and Disabled .
1-7 SYSCLK
1-4 SYSCLK
and
.
and
and
Manual . If
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