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Video BIOS Cacheable
Memory Hole At 15M-16M
PCI Express Root port Function
PCI Express port 1
PCI Express port 2
PCI Express port 3
PCI Express port 4
PCI Express port 5
PCI Express port 6
PCI-E Compliancy Mose
**VGA Setting **
PEG/Onchip VGA Control
On-chip Frame Buffer Size
DVMT Mode
FIXED Memory Size
DVMT Memory Size
Boot Display
5.5 Integrated Peripherals
OnChip IDE Device
IDE HDD Block Mode
IDE DMA Transfer access
On-Chip Primary/ Secondary PCI IDE
Chipset inside the first/second channel of PCI IDE interface
IDE Primary/Secondary Master/Slave PIO
The first/second IDE primary master/primary slave control PIO mode
Default：Auto
IDE Primary/ Secondary Master/Slave UDMA
Default：Disabled
Default：Disabled
Default: Press Enter
Default: Auto
Default: Auto
Default: Auto
Default: Auto
Default: Auto
Default: Auto
Default: v1.0a
Default：Auto
Default：8MB
Default：DVMT
Default：128MB
Default：128MB
Default：Auto
Default: Press Enter
Default：Enabled
Default：Enabled
Default：Enabled
Default：Auto
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