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memory is 32-bits wide. System Firmware and the Boot Project are stored here. No
hardware write protection is provided for the FLASH array.
System Memory (SRAM)
The base version of the CPU Module has 2Mbytes of soldered-down static RAM, im-
plemented with two 512K x 16 asynchronous SRAMs that are configured as a 512K x 32-bit
array. During power loss periods, SRAM is placed into data retention mode (powered by a
backup 3.0V lithium battery). SRAMs operate at 3.3V and are packaged in 44-pin TSOPs.
Critical system information that must be retained during power outages or when the
system has been disabled for maintenance is stored here. Data includes: Last states of all
I/O, historical data, retain variables and pending alarm messages not yet reported. The
SRAM supports 32-bit accesses and is connected to the GP bus.
1.3.2.3 CPU Module Configuration Jumpers
ControlWave EFM CPU Modules are provided with three User Configuration Jumpers
that function as follows:
• JP1 - Battery Backup Disable Jumper - On the Battery Backup Board - When JP1 is
removed, the CPU Module backup battery is disabled.
• JP4 - Status LEDs Disable Jumper - When JP4 is removed, the Status LEDs and the Idle
LED on the System Controller Module (SCM) are disabled.
• JP7 - Comm. port Status LEDs Disable Jumper - When JP7 is removed the CPU Comm.
Port Status LEDs are disabled.
1.3.2.4 CPU Module Configuration Switches
Three user configurable DIP-Switches are provided on the CPU Board; eight-bit DIP-
Switch SW2 is provided for user configuration settings while four-bit DIP-Switch SW1
provides forced recovery functions. Eight-bit DIP-Switch SW3 provides loopback,
termination control, and receiver bias settings for the RS-485 port (COM3).
Table 1-2 - Assignment of CPU Bd. Switch SW2 - User Configurations
Switch
Function
SW2-1
Watchdog Enable
Lock/Unlock
SW2-2
Soft Switches
Use/Ignore
SW2-3
Soft Switches
Core Updump
SW2-4
See Section 3.6
SW2-5
SRAM Control
System Firmware
SW2-6
Load Control *
SW2-8
Enable WINDIAG
* = Boot PROM version 4.7 or higher and System PROM version 4.7 or higher
CI-ControlWave EFM
ON = Watchdog circuit is enabled
OFF = Watchdog circuit is disabled
ON = Write to Soft Switches or FLASH files
OFF = Soft Switches, configurations and FLASH files are locked
ON = Use Soft Switches (configured in FLASH)
OFF = Ignore Soft Switch Configuration and use factory defaults
ON = Core Updump Disabled
OFF = Core Updump via Mode Switch (SW1) on SCM
ON = Retain values in SRAM during restarts
OFF = Force system to reinitialize SRAM
ON = Enable remote download of System Firmware
OFF = Disable remote download of System Firmware
ON = Don't allow WINDIAG to run test
OFF = Disable boot project and allow WINDIAG to run test
Setting
Introduction / 1-11
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