Ns87336Vjg Pin Descriptions; Pin Description - Acer Extensa 61X Service Manual

2.7.4

Pin Description

Table 2-14

NS87336VJG Pin Descriptions

Pin No.
A15-A0 67, 64,
62-60,
29, 19-
28
/ACK 83
ADRATE0, 96,
ADRATE1 46
/AFD 76
AEN 18
/ASTRB 79
BADDR0, 72,
BADDR1 71
BOUT1, 71,
BOUT2 63
BUSY 82
CFG0 63,
CFG1 69
Major Chips Description
I/O Description
I Address. These address lines from the microprocessor determine which
internal register is accessed.
transfer.
I Parallel Port Acknowledge. This input is pulsed low by the printer to
indicate that it has received the data from the parallel port. This pin has
a nominal 25 K
O FDD Additional Data Rate 0,1. These outputs are similar to DRATE0, 1.
They are provided in addition to DRATE0, 1. They reflect the currently
selected FDC data rate, (bits 0 and 1 in the Configuration Control
Register (CCR) or the Data Rate Select Register (DSR), whichever was
written to last).
ADRATE1 is configured when bit 4 of ASC is 1.
DENSEL for further information).
I/O Parallel Port Automatic Feed XT. When this signal is low, the printer
automatically line feed after printing each line. This pin is in a tristate
condition 10 ns after a 0 is loaded into the corresponding Control
Register bit. The system should pull this pin high using a 4.7 K
resistor.
I Address Enable. When this input is high, it disables function selection
via A15-A0. Access during DMA transfer is not affected by this pin.
O EPP Address Strobe.
strobe. It is an active low signal.
I Base Address. These bits determine one of the four base addresses
from which the Index and Data Registers are offset.
down resistor of 30 K
pin to VCC.
O UARTs Baud Output. This multi-function pin supports the associated
serial channel Baud Rate generator output signal if the test mode is
selected in the Power and Test Configuration Register and the DLAB bit
(LCR7) is set. After the Master Reset, this pin offers the SOUT function.
I Parallel Port Busy. This pin is set high by the printer when it cannot
accept another character. It has a nominal 25 K
attached to it.
I Configuration on Power-up. These CMOS inputs select 1 of 4 default
configurations in which the PC87336 powers up. An internal pull-down
resistor of 30 K
to VCC.
A0-A15 are don't cares during DMA
pull-up resistor attached to it.
ADRATE0 is configured when bit 0 of ASC is 1.
This signal is used in EPP mode as address
is on this pin. Use a 10 K
is on each pin. Use a 10 K
(See IRQ5 and
An internal pull-
resistor to pull this
pull-down resistor
resistor to pull these pins
2-79