M7101 Different Pin Definition Setting - Acer Extensa 61X Service Manual

Table 2-4 M7101 Pin Descriptions (Continued)
Name No.
Power Pins
VDD5 x 3 11,59,76
VDD3 x 2 26,100
VDDS x 1 46
VSS x 5 1,19,38,
63,90
2.4.4 Different Pin definition setting
SLED, CCFT, DISPLAY, SPKCTL, SQWO and GPIOC2 pins are all internal pull high 50K
ohms. The blank part of following table means keeping the original pin definition.
When SLED default is pulled high, the chip will be in normal mode.
When SLED is pulled low by 4.7K resistor, the chip will be in test mode.
When GPIOC2 pull low, the PCI ports are 0078/007A and offset 0F6h D15 will be set, otherwise,
0178/017A.
Table 2-5

M7101 Different Pin Definition Setting

Original pin
definition
GPIOA5
GPIOA4
GPIOA1
GPIOA0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
GPIOB1
GPIOB0
GPIOC2
GPIOC1
GPIOC0
2-34
Type
P 5V VDD input
P 3.3V VDD input
P 5V Suspend VDD input. This pin supplies to RI, RTC, HOTKEYJ,
COVSW, SUSTATE, PWGD, SUSRSTJ pad.
P VSS Ground.
CCFT
pull low 4.7K pull low 4.7K
offset 0F6h D1=1 offset 0F6h D2=1
BIOSA17
BIOSA16
ISA16
Description
DISPLAY SPKCTL
pull low 4.7K
offset 0F6h D3=1
GPIOWA
GPIORAJ
STPCLKJ
AMSTATJ
OUT_INIT
OUT_INTR
IN_BRDYJ
IN_INIT
IN_SMIJ
IN_INTR
SQWO
pull low 4.7K
offset 0F6h D4=1
GPIOWB
GPIORBJ
Service Guide