HP Integrity rx4610 User Manual page 145

Chapter 11: Troubleshooting
Case 3
The system is populated with more than one row of memory, the first row memory test encounters a
SBE (Single Bit Error), and the base row test encounters memory errors but not on all the rows. In
this case, the BIOS will write the failing row from first row test into CMOS history, map out the first
row of DIMMs, and continues with base memory testing. The base memory testing will write the
failing rows into CMOS and map out the defective rows upon reset. Since not all the memory in base
memory test (< 2 GB) gets mapped out, then the system will continue to boot with the remaining good
memory found during the base memory test.
User Notification
The defective rows found during first row test and base memory test will be mapped out and the
system will continue to boot with the remaining base memory. An error message will be displayed to
video for the mapped out defect DIMM.
Example: Consider a system that is populated with three rows of 256 MB DIMMS in the upper board
rows 1-4, row 5-8, and row 9-12. If a memory error was detected in DIMM 5 during the first row
memory test and a memory error was encountered in DIMM 1 during base test, the following
messages will appear on the LCD:
"First row test"
"0064 MB"
"BASE MEMORY TEST"
"ERRORS IN MEMORY"
"RESETTING SYSTEM"
Upon reset, you will see the following messages on the LCD:
"First row test"
"0064 MB"
"BASE MEMORY TEST" - displayed on the upper LCD line
The system will continue to boot and the following messages will appear on the screen during POST:
3072 MB Total Memory Installed
1024 MB Configured
1024 MB Tested
The first line is the total memory installed (regardless of condition). The second line is the total
memory useable (and is less than the first line, only if defective DIMMS were found). The third line
counts the memory as the test is being performed. When the test is completed, the number in this line
should equal the number in the second line.
8C99: DIMMs mapped out: Upper Board, 1 – 4
8C9D: DIMMs mapped out: Upper Board, 5 - 8
User Action
If the user is satisfied with the configured memory on the system, no action is required. Otherwise,
follow these steps:
1. Determine the location of the row of defective DIMMs from the error message or by running
the EFI based SELViewer Utility or by running either the Intel Server Control (ISC) or Direct
Platform Control (DPC) to read the System Event Log (SEL). Replace the defective DIMMs
- displayed on the upper LCD line
- displayed on the lower LCD line
- displayed on the upper LCD line
- displayed on the upper LCD line
- displayed on the lower LCD line (prior to resetting if an error was
found)
- displayed on the upper LCD line
- displayed on the lower LCD line
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