Reset Circuit; Bus Control Circuit; Figure 2-29. Reset Circuit; Figure 2-30. Bus Control Circuit - Epson EPL-N1200 Service Manual

Operating Principles EPL-N1200 Service Manual

2.2.1.1 Reset Circuit

The entire system (CPU and external devices) can be initialized if the RESET signal (CPU pin 113)
is active simultaneously. This circuit uses an M5193B IC to monitor the supply voltage if the voltage
level less than 4.25 V is detected. The reset time is approximately 128 ms.

Figure 2-29. Reset Circuit

2.2.1.2 Bus Control Circuit

The MB86930 CPU outputs the R/W (read/write) signal, AS (address strobe) signal, and the BE0,
BE1, BE2, and BE3 signals (byte enables) to the ASIC E05A91. The ASIC E05A91 uses these
signals to generate the RD (read strobe) signal, WR (write strobe) signal, and READY signal.

Figure 2-30. Bus Control Circuit

2-20 Rev. A