Epson EPL-N1200 Service Manual page 25

EPL-N1200 Service Manual
Parallel-B
Pin
Signal Name
No.
1 STROBE
2-9 DATA 1-8
10 ACKNLG
11 BUSY
12 PE
13 SLCT
14 AUTO-FEED
15,18,
NC
34
16 GND
CHASSIS
17
GND
19-30 GND
31 INIT
32 ERROR
33 GND
35 +5
36 SLCT IN
- -
- -
Rev. A
Table 1-8. Parallel Interfaces Pin Assignment
Parallel-C
Pin
I/O Signal Name
No.
I 15 STROBE
I 6-13 DATA 1-8
O 3 ACKNLG
O 1 BUSY
O 5 PE
O 2 SLCT
I 17 AUTO-FEED
- - -
- - -
- - -
- 19-35 GND
I 14 INIT
O 4 ERROR
- - -
- - -
- 16 SLCT IN
Host Logic
- 18
High
Peripheral
- 36
Logic High
I/O
STROBE is a strobe pulse used to read data from
the host computer. The pulse width must be more
I
than 0.5 µsec. Normally it is HIGH, and data is
latched at the trailing edge of this signal.
DATA 1 to 8 are parallel data bits. When the signal
is HIGH, the data bit is 1, and when it is LOW, the
data bit is 0.
I/O
The most significant bit (MSB) is DATA8. The
signal state must be maintained for 0.5 µsec. on
either side of the STROBE signal active edge.
ACKNLG is an acknowledge pulse with an
approximate width of 1 or 10 µsec. This signal
goes LOW when the data reception is completed,
O
which indicates that the printer can accept new
data. Timing with the BUSY signal is specified
through SelecType.
The BUSY signal informs the host computer of the
O printer state. When the signal is HIGH, the printer
cannot accept data.
The PE signal indicates paper empty for the
standard tray selected through SelecType or
O
command, or for the optional paper cassette.
Paper empty is indicated by HIGH.
O Use at reverse mode.
I Not used.
- Not used.
- Logic ground level.
Connected to the printer chassis. The printer
- chassis GND and the signal GND are connected
to each other.
- Ground level for the twisted pair return signal.
The STROBE signal is ignored when this signal is
I
LOW.
This level goes LOW when the printer is:
out of paper
O paper jam
in error state
off line
- Same as for pins 19 to 30.
- Pulled up to +5V through 1.0 Kohm resistance.
I Use the reverse mode.
I Hosyt logic high signal
O Peripheral logic high signal
General Description
Description
1-13