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Intel T8300 - Core 2 Duo 2.4GHz 800MHz 3MB Socket P Mobile CPU Documentation Update page 30

Intel core 2 extreme quad-core mobile processor, intel core2 quad mobile processor, intel core 2 extreme mobile processor, intel core 2 duo mobile processor, intel core 2 solo mobile processor and intel celeron processor on 45-nm process specification upd

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AZ22.
Performance Monitoring Events for Retired Instructions (C0H) May Not
Be Accurate
The INST_RETIRED performance monitor may miscount retired instructions as follows:
Problem:
 Repeat string and repeat I/O operations are not counted when a hardware interrupt
is received during or after the last iteration of the repeat flow.
 VMLAUNCH and VMRESUME instructions are not counted.
 HLT and MWAIT instructions are not counted. The following instructions, if executed
during HLT or MWAIT events, are also not counted:
a) RSM from a C-state SMI during an MWAIT instruction.
b) RSM from an SMI during a HLT instruction.
There may be a smaller than expected value in the INST_RETIRED performance
Implication:
monitoring counter. The extent to which this value is smaller than expected is
determined by the frequency of the above cases.
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AZ23.
Returning to Real Mode from SMM with EFLAGS.VM Set May Result in
Unpredictable System Behavior
Returning back from SMM mode into real mode while EFLAGS.VM is set in SMRAM may
Problem:
result in unpredictable system behavior.
If SMM software changes the values of the EFLAGS.VM in SMRAM, it may result in
Implication:
unpredictable system behavior. Intel has not observed this behavior in commercially
available software.
Workaround: SMM software should not change the value of EFLAGS.VM in SMRAM.
Status:
For the steppings affected, see the Summary Tables of Changes.
30
Errata
Specification Update

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