Intel T8300 - Core 2 Duo 2.4GHz 800MHz 3MB Socket P Mobile CPU Documentation Update page 43

Errata
AZ53. Short Nested Loops That Span Multiple 16-Byte Boundaries May Cause a
Machine Check Exception or a System Hang
Under a rare set of timing conditions and address alignment of instructions in a short
Problem:
nested loop sequence, software that contains multiple conditional jump instructions and
spans multiple 16-byte boundaries, may cause a machine check exception or a system
hang.
Due to this erratum, a machine check exception or a system hang may occur.
Implication:
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AZ54. IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine Check Error
Reporting Enable Correctly
IA32_MC1_STATUS MSR (405H) bit[60] (EN- Error Enabled) is supposed to indicate
Problem:
whether the enable bit in the IA32_MC1_CTL MSR (404H) was set at the time of the last
update to the IA32_MC1_STATUS MSR. Due to this erratum, IA32_MC1_STATUS MSR
bit[60] instead reports the current value of the IA32_MC1_CTL MSR enable bit.
IA32_MC1_STATUS MSR bit [60] may not reflect the correct state of the enable bit in the
Implication:
IA32_MC1_CTL MSR at the time of the last update.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
Specification Update 43