DIGITAL-LOGIC AG
4
D
ETAILED
4.1
The CPU's of the MICROSPACE Products
4.1.1
The F8680/A PC/Chip by Chips & Technologies
4 stage pipeline, 1 MIPS performance, 0.7 micron CMOS technology, SuperState extensions, power
management, fully static CPU, 4 programmable signals (PS1 to PS4), direct support of JEIDA cards,
on-board CGA controller, 26 address lines for 64 MBytes address space, 14 MHz certified, no
MEMCS16, WS0, and BHE signal available
F8680
Rev D-1
F8680A
Rev E
4.2
Interface connectors
The following schematics in chapter 12 show the board's interface connectors and configuration
jumper locations. Connector pinouts and signal definitions are provided in the sections of this chapter
that cover each connector interface. Typical interface cable construction data is also included in the
description of each connector interface.
All of the board's I/0 connectors are dual row male header connectors, of varying lengths. Each of
these headers can be mated with either flat ribbon (IDC) or discretely wired connectors.
In some applications, it is preferable to plug a specialized PC board assembly onto several or all of
the I/0 connectors. This allows you to eliminate cables, meet packaging requirements, add EMI filter-
ing, or in other ways customize the installation of the MICROSPACE in your application.
4.3
Jumper configurations options
For normal AT compatible operation, no special jumpering of the MICROSPACE is required. As
shipped from the manufacturer, the board can be connected to appropriate peripherals and operated
immediately.
Each of the board's jumper options is referred to by a 'J' or 'S' or 'JP' number (i.e. J1- J22). In nearly
every case, the jumper option consists of a pair of pins which is either shorted or unshorted by in-
stalling or removing a shorting block or soldering a bridge. Several jumper options consist of three
pins. For these jumper options, there are three choices: shorting pin 1 to pin 2; shorting pin 2 to pin 3;
or shorting neither. The jumpers could be solder type or stacked type. For solder type are very care-
fully, when you are soldering the bridge with solder.
4.4
'Soft configuration' options
In addition to the various configuration jumper options, there are a number of system configuration
parameters which are initialized by the ROM-BIOS based on the contents of two different nonvolatile
memory devices on the board - an AT compatible nonvolatile static RAM within the real time clock
device, and an unique 128 bit configuration (NVRAM).
The combination of these two devices will be referred to as the board's nonvolatile configuration
memory. Through the use of this configuration memory function, the number of jumper configuration
options has been minimized, and board setup had been simplified. A SETUP-program, is provided on
bootup time with ALT + 'S' or F2 , which is used to specify all of the configuration parameters stored
in the board's nonvolatile configuration memory.
S
D
YSTEM
ESCRIPTION
no 16 Bit I/O accesses possible, PCCARD 1.0, error on sleep mode
16 Bit I/O accesses available, IOCS16 signal, PCCARD 1.0
17
MSM286 Manual V6.4
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