ST STM32WBA65I-DK1 User Manual page 13

7.1.3 Using an external debug tool to program and debug the on-board STM32
Set the embedded STLINK-V3EC to a high‑impedance state. When the jumper JP1 (STLK_RST) is ON, the
embedded STLINK-V3EC is put in Reset state and all GPIOs in high impedance, then the user can connect the
external debug tool on the debug connector (CN14).
MIPI10 pin
-
-
1
2
3
4
5
6
7
8
9
10
-
-
The TAG connector is implemented on the STM32WBA65I-DK1 Discovery kit IoT node board. The TAG connector
is a 10‑pin footprint that supports SWD and JTAG modes.
UM3462 - Rev 1
Table 4. MIPI10 debug connector (CN14) pinout
CN14
NC Reserved
NC Reserved
T_VCC Target VCC
T_SWDIO Target SWDIO using SWD protocol or target JTMS (T_JTMS) using JTAG protocol
GND Ground
T_SWCLK Target SWCLK using SWD protocol or target JCLK (T_JCLK) using JTAG protocol
GND Ground
T_SWO Target SWO using SWD protocol or target JTDO (T_JTMS) using JTAG protocol
Not used by SWD protocol, target JRCLK (T_JRCLK) using JTAG protocol, only for
T_JRCLK
specific use
Not used by SWD protocol, target JTDI (T_JTDI) using JTAG protocol, only for
T_JTDI
external tools
GNDdetect Ground detection for plug indicator, used on SWD and JTAG neither
T_NRST Target NRST using SWD protocol or target JTMS (T_JTMS) using JTAG protocol
T_VCP_RX Target Rx used for VCP (must be UART dedicated to the bootloader
T_VCP_TX Target Tx used for VCP (must be UART dedicated to the bootloader
Figure 8.
Hardware layout and configuration
Function
TAG connector
.
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