ZiLOG Z-80 SIB User Manual page 32

Control code bits
6
and
7
in
asynchronous mode determine how
many stop bits will
trail each data unit.
1
1/2 stop bits
can only
be
specified with
a
16x or 64x
baud rate factor.
In
these two cases, the half stop bit will be
equivalent
to
8
or
32
clock pulses, respectively.
In
synchronous mode, control bits
6
and
7
determine how
character synchronization will
be
achieved.
When syndet
is
an
output, internal synchronization
is
specified; one
or
two
sync characters,
as
specified
by control bit
7,
must
be
detected at the head
of
a
data stream
in
order
to
establish
synchronization
.
Bit No
SYNC MODE
00
5
bits per character
01
6
bits per character
10
7
bits per character
11
8
bits per character
0=Parity disable,
l=Parity enable
O=0dd parity,
l=Even parity
0=Syndet output
l=Syndet input
0=2SYNC characters
1=1 SYNC character
Figure 3.6.2.2: Synchronous Mode Control Codes
24