Cypress Semiconductor MoBL CY62128E Specification Sheet

1-mbit (128k x 8) static ram

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Features
Very high speed: 45 ns
Temperature ranges
Industrial: –40°C to +85°C
Automotive-A: –40°C to +85°C
Automotive-E: –40°C to +125°C
Voltage range: 4.5V to 5.5V
Pin compatible with CY62128B
Ultra low standby power
Typical standby current: 1 μA
Maximum standby current: 4 μA (Industrial)
Ultra low active power
Typical active current: 1.3 mA at f = 1 MHz
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed and power
Offered in standard Pb-free 32-pin STSOP, 32-pin SOIC, and
32-pin TSOP I packages
Logic Block Diagram
CE 1
CE 2
Note
1. For best practice recommendations, refer to the Cypress application note "System Design Guidelines" at
Cypress Semiconductor Corporation
Document #: 38-05485 Rev. *F
, CE
and OE features
1
2,
INPUT BUFFER
A 0
A 1
A 2
A 3
A 4
A 5
128K x 8
A 6
A 7
ARRAY
A 8
A 9
A 10
A 11
COLUMN DECODER
WE
OE
198 Champion Court
1-Mbit (128K x 8) Static RAM

Functional Description

[1]
The CY62128E
is a high performance CMOS static RAM
organized as 128K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99 percent when deselected (CE
eight input and output pins (IO
impedance state when the device is deselected (CE
CE
LOW), the outputs are disabled (OE HIGH), or a write
2
operation is in progress (CE
LOW and CE
1
To write to the device, take Chip Enable (CE
HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO
pins (IO
through IO
) is then written into the location specified
0
7
on the address pins (A
through A
0
To read from the device, take Chip Enable (CE
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the IO pins.
POWER
DOWN
http://www.cypress.com.
,
San Jose
CA 95134-1709
®
MoBL
CY62128E
®
) in portable
HIGH or CE
LOW). The
1
2
through IO
) are placed in a high
0
7
HIGH or
1
HIGH and WE LOW)
2
LOW and CE
1
).
16
LOW and CE
1
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
408-943-2600
Revised August 4, 2008
2
2
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Summary of Contents for Cypress Semiconductor MoBL CY62128E

  • Page 1: Functional Description

    Features Very high speed: 45 ns ■ Temperature ranges ■ Industrial: –40°C to +85°C ❐ Automotive-A: –40°C to +85°C ❐ Automotive-E: –40°C to +125°C ❐ Voltage range: 4.5V to 5.5V ■ Pin compatible with CY62128B ■ Ultra low standby power ■...
  • Page 2: Power Dissipation

    Pin Configuration 32-Pin SOIC Top View Product Portfolio Product Range CY62128ELL Ind’l/Auto-A CY62128ELL Auto-E Notes 2. NC pins are not connected on the die. 3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V 4.
  • Page 3: Electrical Characteristics

    Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage Temperature ... –65°C to +150°C Ambient Temperature with Power Applied ... –55°C to +125°C Supply Voltage to Ground Potential... –0.5V to 6.0V (V DC Voltage Applied to Outputs [5, 6] in High-Z State...
  • Page 4: Thermal Resistance

    Thermal Resistance Parameter Description Θ Thermal Resistance Still Air, soldered on a 3 × 4.5 inch, (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance (Junction to Case) AC Test Loads and Waveform OUTPUT 30 pF INCLUDING JIG AND Equivalent to: SCOPE Parameters...
  • Page 5: Switching Characteristics

    Switching Characteristics (Over the Operating Range) Parameter Description Read Cycle Read Cycle Time Address to Data Valid Data Hold from Address Change LOW and CE OE LOW to Data Valid OE LOW to Low-Z LZOE OE HIGH to High-Z HZOE LOW and CE LZCE HIGH or CE...
  • Page 6: Switching Waveforms

    Switching Waveforms Figure 1. Read Cycle 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID Figure 2. Read Cycle No. 2 (OE Controlled) ADDRESS LZOE HIGH IMPEDANCE DATA OUT LZCE SUPPLY CURRENT Figure 3. Write Cycle No. 1 (WE Controlled) ADDRESS NOTE 21 DATA IO...
  • Page 7 Switching Waveforms (continued) Figure 4. Write Cycle No. 2 (CE1 or CE2 Controlled) ADDRESS DATA IO Figure 5. Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS NOTE 21 DATA IO HZWE Truth Table Document #: 38-05485 Rev. *F DATA VALID DATA VALID Inputs/Outputs High-Z...
  • Page 8: Ordering Information

    Ordering Information Speed Ordering Code (ns) CY62128ELL-45SXI CY62128ELL-45ZAXI CY62128ELL-45ZXI CY62128ELL-45SXA CY62128ELL-45ZXA CY62128ELL-55SXE CY62128ELL-55ZAXE Contact your local Cypress sales representative for availability of these parts. Package Diagrams Figure 6. 32-pin (450 Mil) Molded SOIC (51-85081) Document #: 38-05485 Rev. *F Package Package Type Diagram 51-85081 32-pin 450-Mil SOIC (Pb-free)
  • Page 9 ® MoBL CY62128E Figure 7. 32-pin Shrunk Thin Small Outline Package (8 x 13.4 mm) (51-85094) 51-85094-*D Document #: 38-05485 Rev. *F Page 9 of 12 [+] Feedback...
  • Page 10 ® MoBL CY62128E Figure 8. 32-pin Thin Small Outline Package Type I (8 x 20 mm) (51-85056) Document #: 38-05485 Rev. *F Page 10 of 12 [+] Feedback...
  • Page 11 Document History Page ® Document Title: CY62128E MoBL 1-Mbit (128K x 8) Static RAM Document Number: 38-05485 Submission Revision Date 203120 See ECN 299472 See ECN 461631 See ECN 464721 See ECN 563144 See ECN 1024520 See ECN 2548575 08/05/08 Document #: 38-05485 Rev.
  • Page 12 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless wireless.cypress.com Memories memory.cypress.com...

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