Cypress Semiconductor CY62158E Specification Sheet

Mobl 8-mbit (1m x 8) static ram

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Features
Very high speed: 45 ns
Wide voltage range: 4.5V – 5.5V
Ultra low active power
Typical active current:1.8 mA @ f = 1 MHz
Typical active current: 18 mA @ f = f
Ultra low standby power
Typical standby current: 2 μA
Maximum standby current: 8 μA
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed and power
Offered in Pb-free 44-Pin TSOP II package

Functional Description

®
The CY62158E MoBL
is a high performance CMOS static RAM
organized as 1024K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
Logic Block Diagram
CE 1
CE 2
Cypress Semiconductor Corporation
Document #: 38-05684 Rev. *D
max
, CE
and OE features
1
2
A 0
DATA IN DRIVERS
A 1
A 2
A 3
A 4
A 5
A 6
1024K x 8
A 7
A 8
ARRAY
A 9
A 10
A 11
A 12
COLUMN DECODER
WE
OE
198 Champion Court
8-Mbit (1M x 8) Static RAM
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Placing the device into standby mode reduces
power consumption significantly when deselected (CE
CE
LOW).
2
To write to the device, take Chip Enables (CE
HIGH) and Write Enable (WE) input LOW. Data on the eight IO
pins (IO
through IO
) is then written into the location specified
0
7
on the address pins (A
through A
0
To read from the device, take Chip Enables (CE
HIGH) and OE LOW while forcing the WE HIGH. Under these
conditions, the contents of the memory location specified by the
address pins appear on the IO pins.
The eight input and output pins (IO
a high impedance state when the device is deselected (CE
HIGH or CE
LOW), the outputs are disabled (OE HIGH), or a
2
write operation is in progress (CE
LOW). See the
Truth Table
on page 8 for a complete description
of read and write modes.
For best practice recommendations, refer to the Cypress
application note
AN1064, SRAM System
POWER
DOWN
,
San Jose
CA 95134-1709
®
CY62158E MoBL
®
) in portable
HIGH or
1
LOW and CE
1
).
19
LOW and CE
1
through IO
) are placed in
0
7
LOW and CE
HIGH and WE
1
2
Guidelines.
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
408-943-2600
Revised June 16, 2008
2
2
1
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Summary of Contents for Cypress Semiconductor CY62158E

  • Page 1: Functional Description

    Offered in Pb-free 44-Pin TSOP II package Functional Description ® The CY62158E MoBL is a high performance CMOS static RAM organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This...
  • Page 2: Pin Configuration

    2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05684 Rev. *D Figure 1. 44-Pin TSOP II (Top View) Speed Operating I (ns) f = 1 MHz CY62158E MoBL Power Dissipation (mA) Standby I f = f = 25°C. CC(typ) Page 2 of 10 ®...
  • Page 3: Maximum Ratings

    Still Air, soldered on a 3 × 4.5 inch, two-layer printed circuit board (min) and 200 μs wait time after V spec. Other inputs can be left floating. CCDR CY62158E MoBL [3, 4] ...–0.5V to V + 0.5V CC(max) Ambient...
  • Page 4 Figure 3. Data Retention Waveform DATA RETENTION MODE (min) > 2.0 V (min) > 100 μs or stable at V (min) > 100 μs. to V CY62158E MoBL ALL INPUT PULSES Fall Time = 1 V/ns Unit Ω Ω Ω...
  • Page 5: Switching Characteristics

    , and t HZCE LZCE HZOE LZOE , and CE . All signals must be ACTIVE to initiate a write and any of these signals CY62158E MoBL 45 ns Unit /2, input pulse CC(typ) on page 4. is less than t for any given device.
  • Page 6: Switching Waveforms

    Document #: 38-05684 Rev. *D [13, 14] Figure 4. Read Cycle No. 1 [14, 15] Figure 5. Read Cycle No. 2 DATA VALID transition HIGH. ® CY62158E MoBL DATA VALID HZOE HZCE HIGH IMPEDANCE Page 6 of 10 [+] Feedback...
  • Page 7 18. During this period, the IOs are in output state. Do not apply input signals. Document #: 38-05684 Rev. *D [12, 16, 17] Figure 6. Write Cycle No. 1 VALID DATA [12, 16, 17] Figure 7. Write Cycle No. 2 VALID DATA ® CY62158E MoBL Page 7 of 10 [+] Feedback...
  • Page 8: Ordering Information

    High Z Deselect/Power Down Data Out Read High Z Output Disabled Data in Write Package Package Type Diagram 51-85087 44-Pin TSOP II (Pb-free) CY62158E MoBL LZWE Mode Power Standby (I Standby (I Active (I Active (I Active (I Operating Range Industrial Page 8 of 10 ®...
  • Page 9: Package Diagrams

    ® CY62158E MoBL Package Diagrams Figure 9. 44-Pin TSOP II, 51-85087 51-85087-*A Document #: 38-05684 Rev. *D Page 9 of 10 [+] Feedback...
  • Page 10 Document History Page ® Document Title: CY62158E MoBL 8-Mbit (1M x 8) Static RAM Document Number: 38-05684 REV. ECN NO. Issue Date 270350 See ECN 291271 See ECN 1462592 See ECN VKN/AESA Converted from preliminary to final 2428708 See ECN...

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