Cypress Semiconductor CY62148EV30 Specification Sheet

Mobl 4-mbit (512k x 8) static ram

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Features
Very high speed: 45 ns
Wide voltage range: 2.20V to 3.60V
Temperature ranges
Industrial: –40°C to +85°C
Automotive-A: –40°C to +85°C
Pin compatible with CY62148DV30
Ultra low standby power
Typical standby current: 1 μA
Maximum standby current: 7 μA (Industrial)
Ultra low active power
Typical active current: 2 mA at f = 1 MHz
Easy memory expansion with CE, and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Available in Pb-free 36-ball VFBGA, 32-pin TSOP II and 32-pin
[1]
SOIC
packages
Logic Block Diagram
CE
WE
OE
Notes
1. SOIC package is available only in 55 ns speed bin.
2. For best practice recommendations, refer to the Cypress application note "System Design Guidelines" at http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05576 Rev. *G
A 0
INPUT BUFFER
A 1
A 2
A 3
A 4
A 5
A 6
512K x 8
A 7
A 8
ARRAY
A 9
A 10
A 11
A 12
COLUMN DECODER
198 Champion Court
4-Mbit (512K x 8) Static RAM

Functional Description

[2]
The CY62148EV30
is a high performance CMOS static RAM
organized as 512K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Placing the device into standby mode reduces
power consumption by more than 99 percent when deselected
(CE HIGH). The eight input and output pins (IO
placed in a high impedance state when the device is deselected
(CE HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight IO pins (IO
then written into the location specified on the address pins (A
through A
).
18
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the IO pins.
POWER
DOWN
,
San Jose
CA 95134-1709
®
MoBL
CY62148EV30
®
) in portable
through IO
0
through IO
0
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
408-943-2600
Revised August 4, 2008
) are
7
) is
7
0
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Summary of Contents for Cypress Semiconductor CY62148EV30

  • Page 1: Functional Description

    Document #: 38-05576 Rev. *G 4-Mbit (512K x 8) Static RAM Functional Description The CY62148EV30 organized as 512K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL applications such as cellular telephones.
  • Page 2: Pin Configuration

    4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05576 Rev. *G 32-Pin SOIC/TSOP II Pinout Speed Range (V) (ns) f = 1 MHz ® MoBL CY62148EV30 Top View Power Dissipation Operating I (mA) Standby I (µA) f = f = 25°C.
  • Page 3: Maximum Ratings

    Output Current into Outputs (LOW)... 20 mA Static Discharge Voltage... > 2001V (MIL-STD-883, Method 3015) Latch up Current... > 200 mA Operating Range Product + 0.3V CC(max) CY62148EV30 + 0.3V CC(max) - 45 (Ind’l/Auto-A) Test Conditions Min Typ > 2.70V > 2.70V –0.3...
  • Page 4: Thermal Resistance

    – 0.2V or V < 0.2V DATA RETENTION MODE > 1.5V CC(min) > 100 μs or stable at V to V CC(min) CC(min) ® MoBL CY62148EV30 Unit TSOP II SOIC Unit Package Package °C/W 75.13 °C/W 8.95 Fall Time = 1 V/ns Unit Ω...
  • Page 5: Switching Characteristics

    HZCE LZCE HZOE LZOE . All signals must be ACTIVE to initiate a write and any of these signals can ® MoBL CY62148EV30 - 55 Unit /2, input CC(typ) on page 4. is less than t for any given device.
  • Page 6: Switching Waveforms

    20. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 21. During this period, the IOs are in output state. Do not apply input signals. Document #: 38-05576 Rev. *G DATA VALID DATA VALID ® MoBL CY62148EV30 [16, 17] DATA VALID [17, 18] HZOE HZCE HIGH...
  • Page 7: Truth Table

    Data in Document #: 38-05576 Rev. *G DATA VALID DATA VALID Mode Deselect/Power down Read Output Disabled Write ® MoBL CY62148EV30 [19, 20] [20] LZWE Power Standby (I Active (I Active (I Active (I Page 7 of 12 [+] Feedback...
  • Page 8: Ordering Information

    51-85149 36-ball Very Fine Pitch Ball Grid Array (Pb-free) 51-85095 32-pin Thin Small Outline Package II (Pb-free) 51-85095 32-pin Thin Small Outline Package II (Pb-free) 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) ® MoBL CY62148EV30 Operating Range Industrial Automotive-A Industrial...
  • Page 9 ® MoBL CY62148EV30 Package Diagrams (continued) Figure 7. 32-pin TSOP II (51-85095) 51-85095-** Document #: 38-05576 Rev. *G Page 9 of 12 [+] Feedback...
  • Page 10 0.793[20.142] 0.817[20.751] 0.101[2.565] 0.111[2.819] 0.050[1.270] BSC. 0.014[0.355] 0.020[0.508] Document #: 38-05576 Rev. *G 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 0.006[0.152] 0.012[0.304] 0.118[2.997] MAX. 0.004[0.102] 0.004[0.102] MIN. SEATING PLANE ® MoBL CY62148EV30 0.047[1.193] 0.063[1.600] 0.023[0.584] 0.039[0.990] 51-85081-*B Page 10 of 12 [+] Feedback...
  • Page 11 Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62148EV30 Changed ball C3 from DNU to NC. Removed the redundant footnote on DNU.
  • Page 12 ® Document Title: CY62148EV30 MoBL Document Number: 38-05576 Revision Submission Date 987940 See ECN 2548575 08/05/08 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

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