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Cypress Semiconductor CY8CTMA120 Supplementary Manual

Silicon errata
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September 2008
Silicon Errata for CY8CTST120, CY8CTMG120, and CY8CTMA120
This document describes the errata for the TrueTouch™ devices CY8CTST120, CY8CTMA120, and
CY8CTMG120. Details include errata trigger conditions, scope of impact, available workarounds, and silicon
revision applicability. Compare this document to the device's data sheet for a complete functional description.
Contact your local Cypress Sales Representative if you have questions.

Part Numbers Affected

Part Number
CY8CTxx120

Errata Summary

The following table defines the errata applicability to available CY8CTxx120 family devices.
Items
[1]. Internal Main Oscillator
(IMO) tolerance deviation at
temperature extremes
[2]. The DP line of the USB
interface may pulse low when
the PSoC device wakes from
sleep, causing an unexpected
wakeup of the host computer
[3]. Invalid Flash reads may
occur if Vdd is pulled to -0.5V
just before power on
[4]. PMA Index Register fails
to auto increment with
CPU_Clock set to SysClk/1
(24 MHz)
September 25, 2008
CY8CTST120, CY8CTMG120, CY8CTMA120
Ordering Information
CY8CTST120-56LFXI
CY8CTST120-56LFXIT
CY8CTST120-00AXI
CY8CTMG120-56LFXI
CY8CTMG120-56LFXIT
CY8CTMG120-00AXI
CY8CTMA120-56LFXI
CY8CTMA120-56LFXIT
CY8CTMA120-00AXI
Part Number
Silicon Revision
CY8CTxx120
CY8CTxx120
CY8CTxx120
CY8CTxx120
Document No. 001-49038 Rev. **
A
Silicon fix is planned.
A
Use workaround.
A
Use workaround.
A
Use workaround.
Fix Status
1
[+] Feedback

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Summary of Contents for Cypress Semiconductor CY8CTMA120

  • Page 1 September 2008 Silicon Errata for CY8CTST120, CY8CTMG120, and CY8CTMA120 This document describes the errata for the TrueTouch™ devices CY8CTST120, CY8CTMA120, and CY8CTMG120. Details include errata trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Compare this document to the device’s data sheet for a complete functional description.
  • Page 2 Leaving the analog reference block enabled during sleep also resolves this issue because it forces the bandgap to remain enabled. An example to disable the No Buzz bit is as follows. Assembly M8C_SetBank1 reg[OSC_CR0], 0x20 M8C_SetBank0 OSC_CR0 |= 0x20; September 25, 2008 CY8CTST120, CY8CTMG120, CY8CTMA120 Document No. 001-49038 Rev. ** [+] Feedback...
  • Page 3 USB User Module, which includes the revised firmware as shown in the following example. ;; 24Mhz read PMA workaround M8C_SetBank1 mov A, reg[OSC_CR0] push A September 25, 2008 CY8CTST120, CY8CTMG120, CY8CTMA120 // MSB // LSB Document No. 001-49038 Rev. ** [+] Feedback...
  • Page 4 References [1] Document # 001-46932 CY8CTST120 TrueTouch™ Single-Touch Touchscreen Controller (Final) [2] Document # 001-46929 CY8CTMG120 TrueTouch™ Multi-Touch Gesture Touchscreen Controller (Final) [3] Document # 001-46901 CY8CTMA120 TrueTouch™ Multi-Touch All-Point Touchscreen Controller (Final) September 25, 2008 CY8CTST120, CY8CTMG120, CY8CTMA120 Document No. 001-49038 Rev. **...

  • Page 5: Document History

    CY8CTST120, CY8CTMG120, CY8CTMA120 Document History Document Title: Silicon Errata for CY8CTST120, CY8CTMG120, and CY8CTMA120 Document Number: 001-49038 Revision Submission Orig. of Description of Change Date Change 2572224 09/25/08 New errata for Touchscreen device. PSoC is a registered trademark of Cypress Semiconductor Corp. TrueTouch, Programmable System-on-Chip, PSoC Designer, and PSoC Express are trademarks of Cypress Semiconductor Corp.

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Cy8ctmg120Cy8ctst120

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