Pinouts
(continued)
Pin Definitions
Pin Name
IO Type
A
– A
Input
0
18
A
– A
0
17
DQ
– DQ
Input/Output Bidirectional Data IO Lines for x8 Configuration. Used as input or output lines depending on
0
7
DQ
– DQ
0
15
WE
Input
Input
CE
Input
OE
Input
BHE
Input
BLE
V
Ground
SS
V
Power Supply Power Supply Inputs to the Device.
CC
[6]
Input/Output Hardware Store Busy (HSB). When LOW this output indicates that a hardware store is in progress.
HSB
V
Power Supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
CAP
NC
No Connect
Document #: 001-07102 Rev. *L
Figure 3. Pin Diagram - 54 Pin TSOP II (x16)
NC
1
[5]
NC
2
A
3
0
A
4
1
A
5
2
A
6
3
A
7
4
CE
8
DQ
9
0
DQ
10
1
DQ
11
2
DQ
12
3
V
CC
13
V
14
SS
DQ
15
4
DQ
16
5
DQ
17
6
DQ
18
7
WE
19
A
20
5
A
21
6
A
22
7
A
23
8
A
24
9
NC
25
26
NC
27
NC
Address Inputs Used to Select one of the 524,288 bytes of the nvSRAM for x8 Configuration.
Address Inputs Used to Select one of the 262,144 words of the nvSRAM for x16 Configuration.
operation.
Bidirectional Data IO Lines for x16 Configuration. Used as input or output lines depending on
operation.
Write Enable Input, Active LOW. When selected LOW, data on the IO pins is written to the specific
address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read
cycles. IO pins are tri-stated on deasserting OE HIGH.
Byte High Enable, Active LOW. Controls DQ
Byte Low Enable, Active LOW. Controls DQ
Ground for the Device. Must be connected to the ground of the system.
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull
up resistor keeps this pin HIGH if not connected (connection optional). After each store operation HSB
will be driven HIGH for short time with standard output high current.
nonvolatile elements.
No Connect. This pin is not connected to the die.
54
HSB
[4]
53
NC
52
A
17
51
A
16
50
A
15
49
OE
48
BHE
47
BLE
46
DQ
15
45
DQ
14
54 - TSOP II
44
DQ
(x16)
13
43
DQ
12
42
V
Top View
SS
41
V
(
not to scale)
CC
40
DQ
11
39
DQ
10
38
DQ
9
37
DQ
8
36
V
CAP
35
A
14
34
A
13
33
A
12
32
A
11
31
A
10
30
NC
29
NC
28
NC
Description
- DQ
.
15
8
- DQ
.
7
0
CY14B104L, CY14B104N
Page 3 of 25
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