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Features
• 8- to 32-MHz input frequency range
• CY25818: 8–16 MHz
• CY25819: 16–32 MHz
• Separate modulated and unmodulated clocks
• Accepts clock, crystal, and resonator inputs
• Down spread modulation
• Power-down function
• Low-power dissipation
— CY25818 = 33 mW-typ @ 8 MHz
— CY25818 = 56 mW-typ @ 16 MHz
— CY25819 = 36 mW-typ @ 16 MHz
— CY25819 = 63 mW-typ @ 32 MHz
• Low cycle-to-cycle jitter
— SSCLK = 250 ps-typ
— REFOUT = 275 ps-typ
• Available in 8-pin (150-mil) SOIC package
Block Diagram
300K
XIN/CLKIN
1
XOUT
8
VDD
7
2
VSS
Cypress Semiconductor Corporation
Document #: 38-07362 Rev. *B
Spread Spectrum Clock Generator
REFERENCE
PD and
LF
DIVIDER
CP
VCO
MODULATION
VCO
COUNTER
CONTROL
DIVIDER
INPUT
and
DECODER
MUX
3
6
S0 PD#
•
198 Champion Court
Applications
• Printers and MFPs
• LCD panels and notebook PCs
• Digital copiers
• PDAs
• Automotive
• CD-ROM, VCD, and DVD
• Networking and LAN/WAN
• Scanners
• Modems
• Embedded digital systems
Benefits
• Peak electromagnetic interference (EMI) reduction by
8–16 dB
• Fast time to market
• Cost reduction
Pin Configuration
XIN/CLKIN
Vss
SSCLK
SSCLK
4
5
REFCLK
,
•
San Jose
CA 95134-1709
CY25818/19
1
8
XOUT
2
7
CY25818
Vdd
CY25819
3
6
PD#
S0
4
5
REFCLK
8 Pin SOIC
8-pin SOIC
•
408-943-2600
Revised April 11, 2006
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Related Manuals for Cypress Semiconductor CY25818
Summary of Contents for Cypress Semiconductor CY25818
- Page 1 • Down spread modulation • Power-down function • Low-power dissipation — CY25818 = 33 mW-typ @ 8 MHz — CY25818 = 56 mW-typ @ 16 MHz — CY25819 = 36 mW-typ @ 16 MHz — CY25819 = 63 mW-typ @ 32 MHz •...
- Page 2 Unmodulated Reference Clock Output. The unmodulated output frequency is the same as the input REFCLK frequency. Power-Down Control Pin. Default = H (Vdd). Positive Power Supply. Clock, Crystal, or Ceramic Resonator Output Pin. Leave this pin unconnected if an external clock is used XOUT at X pin. Overview...
- Page 3 = 1/Tmod. The input clock frequency, fin, and the internal divider determine the Modulation Rate. In the case of CY25818/19 devices, the (Spread Spectrum) Modulation Rate, fmod, is given by the following formula: L O G IC...
- Page 4 Cycle-to-Cycle Jitter Characteristics Curves The following curves demonstrate the characteristic behavior of the CY25818/19 when tested over a number of environ- mental and application specific parameters. These are typical performance curves and are not meant to replace any parameter specified in Table 4 and Table 5.
- Page 5 SSCG Profiles CY25818/19 SSCG products use a non-linear “optimized” frequency profile as shown in Figure 6 and Figure 7. The use of Cypress proprietary “optimized” frequency profile maintains flat energy distribution over the fundamental and higher order harmonics. This results in additional EMI reduction in electronic systems.
- Page 6 4. PACKAGE WEIGHT 0.07gms 0.244[6.197] S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.004[0.102] 0°~8° 0.016[0.406] 0.0098[0.249] 0.035[0.889] CY25818/19 Product Flow MAX. PART # 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] 0.0098[0.249] 51-85066-*C Page 6 of 7 [+] Feedback...
- Page 7 Document History Page Document Title: CY25818/19 Spread Spectrum Clock Generator Document Number: 38-07362 Issue REV. ECN NO. Date 112462 03/21/02 122701 12/28/02 448097 See ECN Document #: 38-07362 Rev. *B Orig. of Change Description of Change New Data Sheet Added power up requirements to maximum rating information.
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