Omron CQM1H - 08-2005 Operation Manual page 266

Programmable controllers; inner boards
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direct output
distributed control
DM area
DM word
downloading
EEPROM
electrical noise
EPROM
error code
Error Log Area
even parity
event processing
exclusive NOR
exclusive OR
execution condition
execution cycle
execution time
extended counter
Glossary
A method in which program execution results are output immediately to elimi-
nate the affects of the cycle time.
A automation concept in which control of each portion of an automated sys-
tem is located near the devices actually being controlled, i.e., control is
decentralized and `distributed' over the system. Distributed control is a con-
cept basic to PC Systems.
A data area used to hold only word data. Words in the DM area cannot be
accessed bit by bit.
A word in the DM area.
The process of transferring a program or data from a higher-level or host com-
puter to a lower-level or slave computer. If a Programming Device is involved,
the Programming Device is considered the host computer.
Electrically erasable programmable read-only memory; a type of ROM in
which stored data can be erased and reprogrammed. This is accomplished
using a special control lead connected to the EEPROM chip and can be done
without having to remove the EEPROM chip from the device in which it is
mounted.
Random variations of one or more electrical characteristics such as voltage,
current, and data, which might interfere with the normal operation of a device.
Erasable programmable read-only memory; a type of ROM in which stored
data can be erased, by ultraviolet light or other means, and reprogrammed.
A numeric code generated to indicate that an error exists, and something
about the nature of the error. Some error codes are generated by the system;
others are defined in the program by the operator.
An area used to store records indicating the time and nature of errors that
have occurred in the system.
A communication setting that adjusts the number of ON bits so that it is
always even. See parity.
Processing that is performed in response to an event, e.g., an interrupt signal.
A logic operation whereby the result is true if both of the premises are true or
both of the premises are false. In ladder-diagram programming, the premises
are usually the ON/OFF states of bits, or the logical combination of such
states, called execution conditions.
A logic operation whereby the result is true if one, and only one, of the pre-
mises is true. In ladder-diagram programming the premises are usually the
ON/OFF states of bits, or the logical combination of such states, called execu-
tion conditions.
The ON or OFF status under which an instruction is executed. The execution
condition is determined by the logical combination of conditions on the same
instruction line and up to the instruction currently being executed.
The cycle used to execute all processes required by the CPU Unit, including
program execution, I/O refreshing, peripheral servicing, etc.
The time required for the CPU Unit to execute either an individual instruction
or an entire program.
A counter created in a program by using two or more count instructions in
succession. Such a counter is capable of counting higher than any of the
standard counters provided by the individual instructions.
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