Hardware Count Start/Count Stop And Clear Operation; Hardware Start Operation - Renesas RA4 Efficiency Series User Manual

Under development Preliminary document
Specifications in this document are tentative and subject to change
RA4W1 User's Manual
GPT320.GTCNT counter value
GPT320.GTPR register
bbbb
aaaa
0000 0000h
Register write
GTUDDTYC.OADTY 00b
GTIOC0A pin output
GTIOC0B pin output
[Setting examples]
GPT320.GTIOR.GTIOA[4:0] bits:
GPT320.GTUDDTYC.OADTYR bit: 0b
GPT320.GTIOR.GTIOB[4:0] bits:
GPT320.GTUDDTYC.OBDTYR bit: 1
Figure 23.46 Example of output duty 0% and 100% function
23.3.7

Hardware Count Start/Count Stop and Clear Operation

The GTCNT counter can be started, stopped, or cleared by the following hardware sources:
 External trigger input
 ELC event input
 GTIOCA/GTIOCB pin input.
23.3.7.1

Hardware start operation

The GTCNT counter can be started by selecting a hardware source using GTSSR.
Figure 23.47 shows an example of a count start operation by a hardware source.
GTCNT counter value
0000 0000h
ELC_GPTA input
Figure 23.47 Example of count start operation by a hardware source started, at the input of the signal from the
ELC_GPTA event
R01UH0883EU0050 Rev.0.50
Sep 13, 2019
Register write
10b 11b
0%
00011b
Initial low output, output toggled at compare match, output retained at cycle end
Applied the value of duty 0% or 100% output to GTIOA[3:2] bits function after 0% or 100%
duty setting is released
00011b
Initial low output, output toggled at compare match, output retained at cycle end
Applied the value of masked compare match output to GTIOB[3:2] bits function after 0% or
100% duty setting is released
Count started at ELC event input
23. General PWM Timer (GPT)
Register write
00b
100%
Figure 23.48
GTPR register
Time
shows the setting example.
Time
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