BenQ VL3735 Service Manual page 179

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5
+3 .3 V_HDMI
5V_CBL
5V_CBL
5V_E2P
G
R333
R74
1K
N M_1K
R77
N C
RH1
B
Q13
7
HDMI_ HPD
D
NM_ 2N3904S
1K
R79
J5
TP43
TP44
G1
19
SHELL1
HP DET
TP45
18
+5V
17
GND
TP46
HDMI_ SDA
G3
16
SHELL3
DDC DATA
HDMI_ SCL
15
TP47
DDC CLK
14
NC
TP48
CEC
13
CE Remote
G5
12
Hole1
CK-
11
CK Shield
10
CK+
G6
9
Hole2
D0-
8
D0 Shield
7
D0+
6
T12
D1-
5
D1 Shield
G4
4
SHELL4
D1+
3
D2-
2
D2 Shield
T13
G2
1
SHELL2
D2+
2BC0020011
Z90
T14
Notice: The capacitance of all HDMI
Z90
connector pins can not be larger
than 50pF.
Notice: Close Connector
C
R89
7
HDMI_ MUTE
11
I2 S_DA
11
I2 S_WS
11
I2S_CL
TP50
R91
7
HDMI_RST
R92
7
HDMI_ SCDT
R93
7
HDMI_ INT
B
VCC3.3_RX
L26
Z220
(2A, 0.1 OHM, 0603)
C132
1 U K
VCC3.3_RX
L27
Z220
(2A, 0.1 OHM, 0603)
C135
1 U K
J19
4
4
TP195
VAR14
R
6
6
NM_ 16V 20PF
2
2
3
TP196
A
3
5
5
TP197
R329
0
L
1
1
2 B 1 0 323031
VAR15
NM_ 16V 20PF
5
4
A(1)
J(3)
K(2)
NC
PWR5V
Q11
R75
N C
0
R82
N C
T11
Z90
Z90
VCC1.8_RX
100
RN1
33
I2 S_SD0
5
4
6
3
I2 S_WS0
7
2
I2 S_SCK0
MCLK
8
1
C117
1 8 P J
Y1
C127
R90
1 8 P J
1M
2 8 .322MHZ
TEST
100
100
100
R95
4.7K
R N2
33
ZD18
ZD19
K
A
A
K
TZMC5V1
TZMC5V1
R327
1K
DVI_ AUD_L 11
C399
R328
C400
220P J
220P J
2 2K
ZD20
ZD21
K
A
A
K
TZMC5V1
TZMC5V1
Reset#: HardWare Reset (Low Reset)
R330
1K
DVI_ AUD_R 11
SCDT: indicates active video at HDMI input port
INT: interrupt output (push-pull or open-drain output)
C401
R331
C402
220P J
220P J
2 2K
RSVDL (88): must be tied low
RSVD (48): open
MUTE (67): audio mute output (no active incoming video)
4
3
D N5
+5VS
5V_CBL
BAV70LT1G
A1
A2
5V_E2P
U7
C89
1
8
0 .1 U K
R71
R70
A0
VCC
4.7K
4.7K
2
7
A1
WP
3
6
R76
22
A2
SCL
4
5
R78
22
GND
SDA
AT 2 4C02N-10SU-1.8
DDC(HDMI)
HDMI_ DDC_SDA
HDMI_ DDC_SCL
HDMI_ CEC 7
HDMI_ DCLK-
HDMI_ DCLK+
HDMI_ D0-
HDMI_ D0+
HDMI_ D1-
HDMI_ D1+
HDMI_ D2-
HDMI_ D2+
65
DGND
66
DVCC18
67
MUTE
68
IOVCC
69
IOGND
TP49
70
SPDIF
71
SD3
72
SD2
73
SD1
74
SD0
75
WS
76
SCK
77
IOVCC
78
U 8
IOGND
79
MCLK
SII9011CLU
80
CGND
81
CVCC18
I2C address select CI2CA
82
AUD PVCC18
83
AUD PGND
84
H: 0x62 0x6A
XTALOUT
85
XTALIN
86
L: 0x60 0x68 (defult)
XTALVCC
87
REGVCC
88
RSVDL
89
RESET#
90
SCDT
91
INT
92
QE23
93
QE22
94
QE21
95
QE20
96
QE19
R N5
RN6
R N7
33
33
33
R N4
33
RN3
33
The following chip caps on this page is 0402 type
- 0.1U (16V)
- 1000p (50V)
3
2
G(1)
D(3)
S(2)
+3 .3 V_HDMI
Q12
NC
R72
R73
N C
N C
D
S
D
S
Q14
N C
R80
0
HDMI_ DSDA
HDMI_ DSCL
R81
0
PWR5V
R83
22
R84
22
R85
22
SCL _ CPU 5,9,11
R86
22
SDA_ CPU 5,9,11
VCC3.3_RX
L24
Z220
(2A, 0.1 OHM, 0603)
C101
+
10U M
VCC1.8_RX
digital core supply voltage
R87
N C
R88
4.7K
32
QO3
31
IOVCC
30
IOGND
29
QO4
28
QO5
27
QO6
26
QO7
25
CGND
24
CVCC18
23
QO8
22
QO9
21
QO10
20
QO11
19
IOVCC
18
IOGND
17
QO12
16
QO13
15
QO14
14
QO15
13
CGND
12
CVCC18
11
QO16
10
QO17
9
QO18
8
QO19
7
IOVCC
6
IOGND
5
QO20
4
QO21
3
QO22
2
QO23
1
VSYNC
R94
33
IN0 R2
IN0 R3
IN0 R4
IN0 R5
IN0 R6
IN0 R7
IN0 R8
IN0 R9
IN0 G2
IN0 G3
IN0 G4
IN0 G5
IN0 G6
IN0 G7
IN0 G8
IN0 G9
IN0 B2
IN0 B3
IN0 B4
IN0 B5
IN0 B6
IN0 B7
IN0 B8
IN0 B9
R100
33
IN0 HS
5,7
IN0 PEN 7
R101
33
HDMICL K
R102
33
IN0 CL K 5,7
QE[0..7]
= B[0..7] = CB[0..7]
QE[8..15] = G[0..7] = Y[0..7]
QE[16..23]= R[0..7] = CR[0..7]
2
1
D
(2A, 0.1 OHM, 0603)
L22
VCC3.3_RX
Z220
L23
+3 .3 V_HDMI
Z220
C90
C91
+
+
10U M
10U M
C98
0 .1 U K
(2A, 0.1 OHM, 0603)
L25
+1.8VS
Z220
C102
C110
C103
+
+
10U M
10U M
0 .1 U K
C
I/O pin supply voltage
VCC3.3_RX
C126
+
1 0 U M
B
IN0 VS
5,7
IN0 R[2 ..9] 5,7
+3 .3 V_HDMI
R96
4 7K
R97
47K
IN0 G [2 ..9] 5,7
Q15
B
GAFEOE 5,7
2N3904S
R98
22K
+3 .3 VDD_ADC
U9
74LVC1G126GW
IN0 B[2 ..9] 5,7
1
5
OE
VCC
2
A
3
4
GND
Y
IN0 SOG
5,7
R99
N C
IN0SOG: Asychronous Horizontal Sync Input for PW318
HDMI INPUT
A
BenQ Corporation
Pr oject Code
Mo d el Name
O EM/O DM Model Name
9J.M7375.001
V37C
<OEM/ODM>
Title
MAIN BO ARD
Size
PCB Re v.
Do cu me nt Number
Re v.
PCB P/N
<Size>
2
4H.M7301.S13
S13
9J.M7375.BAE-C3-304-001
T u e sday, April 04, 2006
Date:
Sheet
4
o f
14
Pr epared By
Re vie wed By
Ap p r oved By
HO L IO N LEE
DO MING O HUANG
ANG EL HU
1

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