Zenith Data Systems Z-100 Series Installation Manual page 60

Page
5.10
Card/Circuit Description
Table 5.3. 6845 Pin Functions
PIN NO.
2
3
4-17
18
19
20
21
22
23
24
25
26-33
SIGNAL NAME
GND
RESET*
lPSTB
MAO-MA13
DE
CURSOR
ClK
RIW*
E
RS
CS*
D7-DO
FUNCTION
Provides VDD (ground) to the IC.
A logic low on this pin forces the following action:
The display operation is stopped and all counters
are cleared (the control registers are not affected),
all outputs are driven low.
A low to high transition on this pin latches the cur-
rent address into the light pen strike register.
Memory address lines, defines the character line
of the display. Normally each character line is made
up of several scan lines.
This output is a logic high when the 6845 is ad-
dressing memory. This signal can be used to ena-
ble memory and/or to provide input to memory ac-
cess arbitration logic.
This output is used to light the cursor pixels at the
correct address.
+
5 VDC must be supplied at this pin.
This input is used to synchronize all functions of
the 6845 except the CPU interfacing. This signal
Should be the same frequency as the dot (pixel)
clock.
This signal determines whether the addressed reg-
ister is being read from or written to. A logic low
is used for the write signal.
When this pin is at a low logic level, the data bus
is enabled.
This signal from the CPU determines if the index
register is being addressed (RS
=
0) or the previ-
ously indexed register (RS
=
1) is being ad-
dressed.
When this pin is at a low logic level, the internal
registers can be addressed by the CPU.
These lines are bi-directional, 3-state data lines that
carry the data between the 6845 and the CPU.