Crtc Addressing; Data Management; Crtc - Zenith Data Systems Z-100 Series Installation Manual

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3.4
General Theory of Operation
CRTC Addressing
The CRTC addresses the RAM and the character ROM using a character/
line format. When the computer is turned on, the CPU initializes the
CRTC's internal registers that define the number of characters in a line
and the number of scan lines used to generate a character. In the Z-100
PC Series Computer, the character row is defined to be 80 characters
long.
The CRTC increments the character address by one (1) each time the
memory is addressed until character 80 is reached. The line address is
then incremented by 1 and the character address is reset to O. Note that
the RAM is addressed by the character address and not by the line ad-
dress. The character ROM is addressed by the output of the RAM (ASCII)
and the line address.
Data Management
CRTC
The CRTC is the "manager" of the display and as such has priority over
the CPU in accessing the RAM. The CRTC cannot write to the RAM,
but controls the transfer from the RAM to the monitor. The CPU is allowed
to write to the RAM (or read it) between the character display times of
the CRTC. The CPU can, therefore, only access the RAM once every
512 nanoseconds.
The CRTC addresses a byte of data from the display RAM which is used
to address the font ROM. Font ROM data is transferred into a parallel-in/
serial-out shift register. The attribute byte is read by the decoder at the
same time. The display data is shifted out of the register serially so that
the data is presented to the monitor one bit at a time. The attribute byte
is latched in a register and is present while all bits of the display data
are shifted to the monitor. When all eight bits of the display data have
been sent to the monitor, the next display and attribute bytes are trans-
ferred to the registers. The ninth bit of the display is controlled by external
logic.