Central Processor Unit (Cpu) Ccccsecccccceccccccscccccescece - Prime Computer 50 Series Service Manual

Prime Proprietary Principles of Operation
CHAPTER 4
PRINCIPLES OF OPERATION
4.1 INTRODUCTION
The operations of the 50 Series system are represented by the
following major functional blocks:
® Central Processing Unit (CPU)
@ Main Memory
e@ Chassis and Backplane
@ Peripheral Controllers
@ Communication Controllers
@ Virtual Control Panel (VCP)
® Power Supplies
@ Power Distribution Unit (PDU)
4.2 CENTRAL PROCESSOR UNIT (CPU)
Two and three board 50 Series Central Processing Units (CPUs) have the
basic central processor logic implemented on an A and B board (Figures
4-1 and 4-2). The three board processors (P550-II, 500, 650) in
addition to the A and B boards, have an extended instruction set (XIS)
board with additional hardware implemented arithmetic functions
(Figure 4-3). The 750 (Figure 4-4) is a five board processor made up
of:
@ A Board (execution unit): Performs the same functions as the A
board in the two and three board processors. Includes
microcode, register files, PIO logic, major data buses and
ALUs.
e XIS Board: Expands the functions of the XIS board found in
earlier processors. Contains AlWs for binary, decimal,
fractional and exponential operations, plus a shifter to speed
up arithmetic operations.
e C Board: Contains some of the same functions as the B board of
earlier processors. Functions include, cache memory, Segment
Table Lookaside Buffer (STLB), and memory timer.
@e CS Board (Burst Mode Processor): Holds control store PROM
which supplies microcode words to all boards,
With wide-word memories and burst mode controllers, the burst
mode processor performs four DMA transfers in the time it used
to take to perform one transfer.
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