Mitsubishi Electric MELSEC iQ-R RD78G4 User Manual page 172

Monitor data
■Servo input axis monitor data
n: Axis No. - 1
Item
[Md.300] Servo input axis position value
[Md.301] Servo input axis speed
[Md.302] Servo input axis phase compensation amount
[Md.303] Servo input axis rotation direction restriction amount
■Synchronous encoder axis monitor data
j: Synchronous encoder axis No. - 1
Item
[Md.320] Synchronous encoder axis position value
[Md.321] Synchronous encoder axis position value per cycle
[Md.322] Synchronous encoder axis speed
[Md.323] Synchronous encoder axis phase compensation amount
[Md.324] Synchronous encoder axis rotation direction restriction amount
[Md.325] Synchronous encoder axis status
[Md.326] Synchronous encoder axis error No.
[Md.327] Synchronous encoder axis warning No.
■Command generation axis monitor data
n: Axis No. - 1
Item
[Md.20] Command position value
[Md.22] Speed command
[Md.23] Axis error No.
[Md.24] Axis warning No.
[Md.25] Valid M code
[Md.26] Axis operation status
[Md.27] Current speed
[Md.28] Axis speed command
[Md.29] Speed-position switching control positioning movement amount
[Md.31] Status
[Md.32] Target value
[Md.33] Target speed
[Md.38] Start positioning data No. setting value
[Md.39] In speed limit flag
[Md.40] In speed change processing flag
APPX
170
Appendix 1 List of Buffer Memory Addresses (for Synchronous Control)
Refresh cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Refresh cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Refresh cycle
Operation cycle
Operation cycle
Immediate
Immediate
Immediate
Immediate
Immediate
Operation cycle
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Immediate
Buffer memory address
Axis 1 to axis 16
33120+10n
33121+10n
33122+10n
33123+10n
33124+10n
33125+10n
33126+10n
33127+10n
Buffer memory address
Axis 1 to axis 16
35200+20j
35201+20j
35202+20j
35203+20j
35204+20j
35205+20j
35206+20j
35207+20j
35208+20j
35209+20j
35210+20j
35211+20j
35212+20j
*1
Buffer memory address
60900+120n
60901+120n
60904+120n
60905+120n
60906+120n
60907+120n
60908+120n
60909+120n
60910+120n
60911+120n
60912+120n
60913+120n
60914+120n
60915+120n
60917+120n
60918+120n
60919+120n
60920+120n
60921+120n
60929+120n
60930+120n
60931+120n