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SuperServer 1029P-NES32R User's Manual
SDDC Plus One (Available when this feature is supported by the CPU & the
item: Intel Run Sure is set to Disable)
SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-
bit max.) memory faults that affect an entire single x4 DRAM device. SDDC Plus One
is the enhanced feature to SDDC. SDDC+1 will spare the faulty DRAM device out after
an SDDC event has occurred. After the event, the SDDC+1 ECC mode is activated to
protect against any additional memory failure caused by a 'single-bit' error in the same
memory rank. The options are Disable and Enable*. (The option "Enable" can be set as
default when it is supported by the motherboard.)
ADDDC Sparing
Adaptive Double Device Data Correction (ADDDC), which is an enhanced feature to
DDDC, will not issue a performance penalty before a device fails. Please note that virtual
lockstep mode will only start to work for ADDDC after a faulty DRAM module is spared.
The options are Enable and Disable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected on a memory module and send the correction to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache
line every 16K cycles, if there is no delay caused by internal processing. By using this
method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The
options are Disable and Enable.
Patrol Scrub Interval
This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The default setting is 24.
IIO Configuration
EV DFX Features
CPU1 Configuration
IOU0 (II0 PCIe Br1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
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