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iWave iW-RainboW-G40M Hardware User's Manual

Smarc system on module
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i.MX 8M Plus SMARC SOM Hardware User Guide
iW-RainboW-G40M
i.MX 8M Plus Quad/QuadLite/Dual
SMARC System On Module
Hardware User Guide
REL1.0
iWave Systems Technologies Pvt. Ltd.
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Summary of Contents for iWave iW-RainboW-G40M

  • Page 1 8M Plus SMARC SOM Hardware User Guide iW-RainboW-G40M i.MX 8M Plus Quad/QuadLite/Dual SMARC System On Module Hardware User Guide REL1.0 iWave Systems Technologies Pvt. Ltd. Page 1 of 74...
  • Page 2 If you are not the intended recipient (or authorized to receive for the recipient), you are hereby notified that any disclosure, copying distribution or use of any of the information contained within this document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.” REL1.0 iWave Systems Technologies Pvt.
  • Page 3 No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.

  • Page 4: Table Of Contents

    2.7.14 SPI Interface............................43 2.7.15 Data UART ............................. 44 2.7.16 SMARC GPIOs ............................45 2.7.17 CAN Interface............................47 2.7.18 I2C Interface ............................48 2.7.19 Control Signals ............................48 2.7.20 Boot Select ............................. 50 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 4 of 74...
  • Page 5 3.2.4 Electrostatic Discharge ........................... 70 Mechanical Characteristics ........................71 3.3.1 i.MX 8M Plus SMARC SOM Mechanical Dimensions ................71 ORDERING INFORMATION ..........................72 APPENDIX ................................. 73 i.MX 8M Plus SMARC SOM Development Platform..................73 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 5 of 74...
  • Page 6 Table 8: Power Input Requirement ..........................65 Table 9: Power Sequence Timing ..........................66 Table 10: Power Consumption ..........................67 Table 11: Environmental Specification........................68 Table 12: Orderable Product Part Numbers ....................... 72 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 6 of 74...

  • Page 7: Introduction

    This document is the Hardware User Guide for the SMARC V2.1.1 SOM based on the NXP’s i.MX 8M Plus (Quad/QuadLite/Dual) Application processor. This board is fully supported by iWave Systems Technologies Pvt. Ltd. This Guide provides detailed information on the overall design and usage of the i.MX 8M Plus SMARC SOM from a Hardware Systems perspective.
  • Page 8 Smart Mobility ARChitecture System on Chip System On Module SPDIF The Sony/Philips Digital Interface Serial Peripheral Interface UART Universal Asynchronous Receiver/Transmitter Universal Serial Bus Video Processing Unit Wi-Fi Wireless Fidelity REL1.0 iWave Systems Technologies Pvt. Ltd. Page 8 of 74...

  • Page 9: Terminology Description

    Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes the pull-ups or pull-downs implemented On-SMARC SOM. References • IMX8MPXEC_Rev_x.pdf • iMX_8M_Plus_RM_Revx.pdf • SMARC Specification v2.1.1 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 9 of 74...

  • Page 10: Important Note

    In this signal, BCONFIG_0 is the GPIO functionality and GPIO1_05 is the GPIO number. Note: The above naming is not applicable for other signals which are not connected to SoC. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 10 of 74...

  • Page 11: Architecture And Design

    This section provides detailed information about i.MX 8M Plus SMARC SOM features and Hardware architecture with high level block diagram. i.MX 8M Plus SMARC SOM Block Diagram iW-RainboW-G40M - i.MX 8M Plus Q/QL/D SMARC SOM Block Diagram RGMII GbE-0 ENET_QOS...

  • Page 12: I.mx 8M Plus Smarc Som Features

    USB 2.0 Host x 4Ports (through On-SOM USB Hub) • PCIe x 1 Ports • MIPI CSI x 2 Channel (1 x 2 Lane and 1 x 4 Lane) • HDMI 2.0 Transmitter x 1 Port REL1.0 iWave Systems Technologies Pvt. Ltd. Page 12 of 74...
  • Page 13 Form Factor : 82mm X 50mm (SMARC V2.1.1 Specification) Memory Size will differ based on iWave’s SOM Product Part Number. In Murata-1MW, Wi-Fi is supported by using SDIO interface, hence On SOM microSD will be an optional feature. In default configuration, UART3 interface of i.MX 8M Plus is connected to SMARC Edge. If on SOM GNSS module is used, UART3 will not be supported on SMARC Edge.

  • Page 14: I.mx 8M Plus Soc

    8M Plus SoC iW-RainboW-G40M SMARC SOM can support i.MX 8M Plus SoCs from NXP. The i.MX 8M Plus Family consists of three processors: i.MX 8M Plus Quad, i.MX 8M Plus QuadLite & i.MX 8M Plus Dual. The Major Difference between i.MX 8M Plus SoCs are: •...

  • Page 15: Pca9450C Pmic

    8M Plus SoC to support LPDDR4 up to 2GHz speed. LPDDR4 part U14 is placed on Top side of the SOM. The RAM size can be expandable up to maximum of 8GB. To customize the LPDDR4 memory size, contact iWave.

  • Page 16: Network & Communiation

    Figure 3: Micro SD Connector Note: In default configuration USDHC1 is used for on board Wi-Fi module. Contact iWave Support team if microSD feature is required or refer Application Note: “AN4004-i.MX 8M PLUS SMARC SOM-Enabling On SOM Micro SD Support- Application Note-R2.0-REL1.1.pdf”...

  • Page 17: Gnss Module (Optional)

    Host and Device. The Antenna pin of the module can be connected to the J6 Antenna connector through an Active or Passive Path as per the requirement. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 17 of 74...

  • Page 18: Rtc Controller

    : 734120110 from Molex. Antenna Part Number - : TBD Note: In default configuration GNSS Module is not populated. Contact iWave Support team if GNSS feature is required or refer Application Note: “AN4005-i.MX 8M PLUS SMARC SOM-Enabling On SOM GNSS Support-Application Note- R2.0-REL1.0.pdf”...

  • Page 19: Smarc Pcb Edge Connector

    Figure 5: SMARC Edge Connector Number of Pins - : 314 Connector Part - : Not Applicable (On Board PCB Edge connector) Mating Connector - : 91782-3140M-001 from Aces REL1.0 iWave Systems Technologies Pvt. Ltd. Page 19 of 74...

  • Page 20: Table 3: Smarc Edge Connector Pinouts

    GBE0_MDI1+ GBE1_MDI3- VPHY0_DVDDL VPHY1_DVDDL GBE0_MDI0- NC (Optionally GBE0_SOP) GBE0_MDI0+ NC (Optionally GBE0_SON) GBE1_LINK_ACT# NC (Optionally GBE0_SIP) GPIO2_20(SD2_WP) NC (Optionally GBE0_SIN) SD2_CMD GPIO2_12(SD2_CD_B) USB_HUB3OUT_DP SD2_CLK USB_HUB3OUT_DM GPIO2_19(SD2_RESET_B) VBUS_OTG1 SAI2_MCLK SD2_DATA0 SAI2_TX_SYNC(SAI2_TXFS) REL1.0 iWave Systems Technologies Pvt. Ltd. Page 20 of 74...
  • Page 21 USB_HUB4_OC ECSPI2_SCLK ECSPI2_MISO(I2C4_SCL) ECSPI2_MOSI USB_HUB4OUT_DP USB_HUB4OUT_DM (Optionally USB_OTG1_DP) (Optionally USB_OTG1_DM) USB1_TX_P (Optionally USB1_OTG_OC(GPIO1_IO13)) USB1_TX_N (Optionally VBUS_OTG1) (Optionally USB_OTG1_ID) USB_HUB1OUT_DP USB1_RX_P USB_HUB1OUT_DM USB1_RX_N USB_HUB1_OC USB_OTG1_DP USB_HUB2OUT_DP USB_OTG1_DM USB_HUB2OUT_DM USB_HUB2_OC USB2_TX_P USB2_TX_N REL1.0 iWave Systems Technologies Pvt. Ltd. Page 21 of 74...
  • Page 22 P101 S102 HDMI_TX_CLK_N P102 S103 P103 S104 USB_OTG1_ID HDMI_TX_HPD P104 S105 HDMI_TX_DDC_SCL P105 S106 HDMI_TX_DDC_SDA P106 S107 SMARC_GPIO_12_GPIO3_21(NAND_DQS) P107 S108 LVDS1_CLK_P (Optionally GPIO3_IO28(HDMI_CEC)) SMARC_GPIO_0_GPIO4_18(SAI1_TXD6) P108 S109 LVDS1_CLK_N SMARC_GPIO_1_GPIO4_19(SAI1_TXD7) P109 S110 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 22 of 74...
  • Page 23 NC (Optionally UART1_RX) P137 S138 LVDS0/DSI0_D3_N NC (Optionally UART1_CTS_B) P138 S139 I2C5_SCL(SPDIF_TX) NC (Optionally UART1_RTS_B) P139 S140 I2C5_SDA(SPDIF_RX) UART4_TXD P140 S141 PWM1_OUT(I2C4_SDA) P141 S142 UART4_RXD (Optionally SMARC_GPIO_12_GPIO3_21(NAND_DQS)) P142 S143 FLEXCAN1_TX(SAI5_RXD1) P143 S144 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 23 of 74...
  • Page 24 VDD_IN P149 S150 VIN_PWR_BAD# VDD_IN P150 S151 VDD_IN P151 S152 VDD_IN P152 S153 CARRIER_STBY# VDD_IN P153 S154 CARRIER_PWR_ON VDD_IN P154 S155 FORCE_RECOV# VDD_IN P155 S156 VDD_IN P156 S157 TEST# S158 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 24 of 74...

  • Page 25: Gigabit Ethernet

    Further, the AR8031 supports Wake-on-LAN (WoL) feature to be able to help manage and regulate total system power requirements. The GBE0 of i.MX 8M Plus SMARC SOM also optionally supports TSN feature. Contact iWave if TSN support is required. For more details on GBE0 pinouts, refer below Table:...
  • Page 26 IO, GBE Second Gigabit Ethernet MDI differential pair 3 negative. GBE1_CTREF VPHY1_DVDDL Power Power for the Centre Tap of Mack Jack connector. GBE1_LINK_ACT# GBE1_LINK_ACT# O, 3.3V CMOS Ethernet Activity status LED. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 26 of 74...

  • Page 27: Mdio Interface (Optional)

    SD command. AB28 CMOS Note: 10K pullup option is provided. SDIO_CD# GPIO2_12(SD2_C SD2_CD_B/ I, 1.8V/3.3V SD Card Detect. D_B) AD29 CMOS 10K PU SDIO_CK SD2_CLK SD2_CLK/ O, 1.8/3.3V SD Clock REL1.0 iWave Systems Technologies Pvt. Ltd. Page 27 of 74...

  • Page 28: Usb3.0 Otg Interface

    Note: Same power is also connected to P63 pin through resistor default populated. USB3_SSTX+ USB1_TX_P USB1_TX_P/ O, USB SS/ USB 3.0 OTG Super Speed 0.1uf AC Transmit Positive. coupled REL1.0 iWave Systems Technologies Pvt. Ltd. Page 28 of 74...

  • Page 29: Usb3.0 Host Interface

    Name/ Description Pin No. Pin Name Signal Name Termination Pin Number USB2+ USB_HUB2OUT_ IO, USB USB 2.0 Port2 Data Positive. Note: This pin is connected from 4port USB Hub Out2. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 29 of 74...

  • Page 30: Usb 2.0 Otg Interface (Optional)

    8M Plus SoC USB1 Data Positive for USB 2.0 OTG through resistor and default not populated. Note: USB1 Data Positive is by default connected to S68 through resistor and default populated. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 30 of 74...

  • Page 31: Usb 2.0 Host Interface

    Note: In default configuration USB2.0 lines of the OTG1 controller is connected to the USB3port of the SMARC Edge Connector. To support USB2.0 OTG on USB0 port of SMARC Edge, contact iWave Support team or refer Application Note: “AN4002-i.MX 8M PLUS SMARC SOM-Enabling USB 2.0 OTG Support in SMARC Edge-Application Note-R2.0- REL1.0.pdf”.
  • Page 32 USB 2.0 Port4 Data Positive. Note: This pin is connected from 4port USB Hub Out4. USB5- USB_HUB4OUT_ IO, USB USB 2.0 Port4 Data Negative. Note: This pin is connected from 4port USB Hub Out4. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 32 of 74...

  • Page 33: Pcie Interface

    The i.MX 8M Plus SoC supports two 4-lane camera interfaces, the CSI-2 Rx Controller Core is compliant to MIPI CSI2 Specification V1.3 except for C-PHY feature. The D-PHY interface of the CSI-2 Rx Controller Core supports PHY Protocol REL1.0 iWave Systems Technologies Pvt. Ltd. Page 33 of 74...
  • Page 34 Pin Number Termination CSI1_TX+ / I2C5_SCL(SPDIF_TX) SPDIF_TX/ O, 1.8V MIPI CSI2 I2C Clock. I2C_CAM1_CK AE18 CMOS/ 4.7K PU CSI1_TX- / I2C5_SDA(SPDIF_RX) SPDIF_RX/ IO, 1.8V MIPI CSI2 I2C Data. I2C_CAM1_DAT AD18 CMOS/ REL1.0 iWave Systems Technologies Pvt. Ltd. Page 34 of 74...

  • Page 35: Hdmi Tx Interface

    1 Positive HDMI_D1- / HDMI_TX_D1_N HDMI_TX1_N/AJ26 O, HDMI HDMI differential DP1_LANE1- data lane 1 Negative HDMI_D0+ / HDMI_TX_D0_P HDMI_TX0_P/AH25 O, HDMI HDMI differential DP1_LANE2+ data lane 0 Positive REL1.0 iWave Systems Technologies Pvt. Ltd. Page 35 of 74...

  • Page 36: Mipi Dsi Display Interface

    0 positive Note: Optionally connected to LVDS0 differential data lane 0 positive S126 LVDS0_0- / LVDS0/DSI0_D0_N MIPI_DSI1_D0_N/ O, MIPI MIPI DSI1 eDP0_TX0- / differential data DSI0_D0- lane 0 negatives REL1.0 iWave Systems Technologies Pvt. Ltd. Page 36 of 74...
  • Page 37 O, 1.8V LCD0 Power (NAND_DATA02) CMOS Enable S134 LVDS0_CK+ / LVDS0/DSI0_CLK_P MIPI_DSI1_CLK_P/ O, MIPI MIPI DSI1 eDP0_AUX+ / differential Clock DSI0_CLK+ positive Note: Optionally connected to LVDS0 differential Clock positive REL1.0 iWave Systems Technologies Pvt. Ltd. Page 37 of 74...

  • Page 38: Mipi Lvds Display Interface

    2 clocks), it can support upto 160MHz pixel clock with resolutions above 1366x768p60, up to 1080p60. For more details on LVDS0 pinouts on Display Controller0 of SMARC PCB Edge Connector, refer below table: REL1.0 iWave Systems Technologies Pvt. Ltd. Page 38 of 74...
  • Page 39 LVDS0 differential data lane 1 negative S131 LVDS0_2+ / LVDS0/DSI0_D2_P LVDS0_D2_PP/ O, MIPI By default, eDP0_TX2+ / connected to DSI0_D2+ MIPI DSI1 differential data lane 2 positive. Optionally connected to REL1.0 iWave Systems Technologies Pvt. Ltd. Page 39 of 74...
  • Page 40 LVDS0_3+ / LVDS0/DSI0_D3_P LVDS0_D3_P/ H29 O, MIPI By default, eDP0_TX3+ / connected to DSI0_D3+ MIPI DSI1 differential data lane 3 positive. Optionally connected to LVDS0 differential data lane 3 positive REL1.0 iWave Systems Technologies Pvt. Ltd. Page 40 of 74...
  • Page 41 Brightness control PWM Note: Contact iWave support team if LVDS0 supported SOM is required or refer Application note: “AN4001-i.MX 8M PLUS SMARC SOM-Enabling LVDS Support in SMARC Edge-Application Note-R2.0-REL1.0.pdf” For more details on LVDS1 pinouts on Display Controller1 of SMARC PCB Edge Connector, refer below table:...
  • Page 42 S121 LVDS1_3- / LVDS1_D3_N LVDS1_D3_N/ O, LVDS LVDS1 eDP1_TX3- / differential data DSI1_D3- lane 3 negative S122 LCD1_BKLT_PWM PWM2_OUT(SAI5_RXD0) SAI5_RXD0/ O, 1.8V CMOS LCD0 Back Light AE16 Brightness control PWM REL1.0 iWave Systems Technologies Pvt. Ltd. Page 42 of 74...

  • Page 43: Audio Interface

    SPI bus as a master and/or a slave with maximum data rate of 52 Mbits/s. The i.MX 8M Plus SMARC SOM supports SPI0 and SPI1 channels of the SMARC Edge connector using ECSPI1 and ECSPI2 of SoC. For more details on SPI pinouts, refer below table: REL1.0 iWave Systems Technologies Pvt. Ltd. Page 43 of 74...

  • Page 44: Data Uart

    SAI3_RXC/ O, 1.8V CMOS UART2 Request to Send. AJ18 P132 SER0_CTS# UART2_RTS_B(SAI3_RXD) SAI3_RXD/ I, 1.8V CMOS UART2 Clear to Send. AF18 P134 SER1_TX UART3_TXD NAND_CE0_B/ O, 1.8V CMOS UART3 Transmitter. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 44 of 74...

  • Page 45: Smarc Gpios

    SMARC Edge Type/ C Pin SMARC Edge Signal Name Description Pin Name Pin Number Terminatio P108 GPIO0 / SMARC_GPIO_0_GPIO4_18(SAI1_TXD6) SAI1_TXD6/AC1 IO, 1.8V SMARC CAM0_PWR CMOS General Purpose Input/outpu t 0. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 45 of 74...
  • Page 46 Purpose Input/outpu t 8. P117 GPIO9 SMARC_GPIO_9_GPIO4_3(SAI1_RXD1) SAI1_RXD1/AF1 IO, 1.8V SMARC CMOS General Purpose Input/outpu t 9. P118 GPIO10 SMARC_GPIO_10_GPIO3_21(SAI5_RXFS SAI5_RXFS/AC1 IO, 1.8V SMARC CMOS General Purpose Input/outpu t 10. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 46 of 74...

  • Page 47: Can Interface

    SAI5_RXD2/ I, 1.8V CMOS CAN 1 Receiver. AF16 P145 CAN1_TX FLEXCAN2_TX(SAI5_RXD3) SAI5_RXD3/ O, 1.8V CMOS CAN 2 Transmitter. AE14 P146 CAN1_RX FLEXCAN2_RX(SAI5_MCLK) SAI5_MCLK/ I, 1.8V CMOS CAN 2 Receiver. AF14 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 47 of 74...

  • Page 48: I2C Interface

    SMARC Edge Pin Type/ C Pin SMARC Edge Signal Name Name/ Description Name Terminatio Pin Number P126 RESET_OUT# GPIO_RESET_OUT_GPIO1_9_1 GPIO1_IO08/A I, 1.8V RESET OUT from CMOS SoC to all other peripherals. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 48 of 74...
  • Page 49 CMOS power should be 10K PU enabled only after CARRIER_PWR_O N goes High. S157 TEST# TEST# I, 1.8V Not supported. CMOS Note: This pin is connected to GND in SOM. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 49 of 74...

  • Page 50: Boot Select

    Boot Media Select bit 1 10K PU P125 BOOT_SEL2# BOOT_SEL2# I, 1.8V CMOS Boot Media Select bit 2 10K PU S155 FORCE_RECOV# FORCE_RECOV# I, 1.8V CMOS Active low Force 10K PU Recovery Input. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 50 of 74...

  • Page 51: Power And Gnd

    S25, S34, S47, S61, S64, S67, S70, S73, S80, S83, S86, S89, S92, S101, S110, S119, S124, S130, S136, S143, S158 S147 VDD_RTC VDD_RTC I, 3V Power 3V coin cell input for RTC. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 51 of 74...

  • Page 52: Other Features

    Mating Connector - 51021-0200 from Molex Table 4: FAN Header Pin Assignment Signal Type/ Pin No Signal Name Description Termination VCC_5V O, Power +5V Power output to FAN. Power Ground. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 52 of 74...

  • Page 53: Mipi Csi Camera Connector (Optional)

    I, MIPI MIPI CSI1 differential data lane 3 positive. MIPI_CSI1_D3_N MIPI_CSI1_D3_N/ I, MIPI MIPI CSI1 differential data lane 3 negative. Power Ground. MIPI_CSI1_CLK_P MIPI_CSI1_CLK_P/ I, MIPI MIPI CSI1 differential Clock positive. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 53 of 74...
  • Page 54 CLKIN1 CLKIN1/ I, 1.8V CMOS Clock In to SoC. CLKIN2/ CLKIN2 I, 1.8V CMOS Clock In to SoC. Power Ground. CAM0_GPIO GPIO1_IO03/ IO, 1.8V CMOS GPIO for MIPI CSI1 Camera. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 54 of 74...

  • Page 55: Debug Uart Header (Optional)

    VTREF Voltage Reference. VFRE_JTAG1 O, 1.8V Power Supply Voltage. O, 1.8V CMOS/ Only pull up is provided. 10K PU Power Ground. JTAG_TDI JTAG_TDI/ I, 1.8V CMOS/ JTAG test data input. 10K PU REL1.0 iWave Systems Technologies Pvt. Ltd. Page 55 of 74...
  • Page 56 10K PU Power Ground. O, 1.8V CMOS/ Only pull up is provided. 10K PU Power Ground. Only pull up is provided. Power Ground. Only pull down is provided. Power Ground. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 56 of 74...

  • Page 57: I.mx 8M Plus Pin Multiplexing On Smarc Edge

    SMARC edge connector and with selected pin function highlighted and available alternate functions. This table has been prepared by referring NXP’s i.MX 8M Plus Hardware Reference Manual. Important Note: It is strongly recommended to use the pin function same as selected in the SMARC SOM Edge connector for iWave’s BSP reusability and to have compatible SMARC modules in future for upgradability.
  • Page 58 I2C5_SCL GPIO5_IO3 I2C5_SCL ARE1 GPT1_COMP FLEXCAN1_R AD18 SPDIF1_IN PWM2_OUT I2C5_SDA GPIO5_IO4 I2C5_SDA ARE2 MIPI_DSI1_CLK_ MIPI_DSI1_CLK_ S135 MIPI_DSI1_CLK_ MIPI_DSI1_CLK_ S134 MIPI_DSI1_D0_ MIPI_DSI1_D0_ MIPI DSI0 S126 MIPI_DSI1_D0_ MIPI_DSI1_D0_ S125 MIPI_DSI1_D1_ MIPI_DSI1_D1_ S129 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 58 of 74...
  • Page 59 LVDS1_D2_N LVDS1_D2_N LVDS1 S117 LVDS1_D2_P LVDS1_D2_P S121 LVDS1_D3_N LVDS1_D3_N S120 LVDS1_D3_P LVDS1_D3_P SAI1_TX_DA PDM_BIT_ST S122 AE16 SAI5_RX_DATA0 PWM2_OUT I2C5_SCL GPIO3_IO21 PWM2_OUT REAM0 ISP_SHUTTE S107 NAND_DQS QSPI_A_DQS SAI3_MCLK GPIO3_IO14 GPIO3_IO14 R_OPEN_0 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 59 of 74...
  • Page 60 USDHC2_DATA2 REAM2 SD Interface ECSPI2_MIS PDM_BIT_ST SRC_EARLY_ AA25 USDHC2_DATA3 SPDIF1_IN GPIO2_IO18 USDHC2_DATA3 REAM3 RESET USDHC2_RESET SRC_SYSTEM AD28 GPIO2_IO19 GPIO2_IO19 _RESET CORESIGHT_ AC26 USDHC2_WP GPIO2_IO20 GPIO2_IO20 EVENTI GPIO2_IO1 AD29 USDHC2_CD_B USDHC2_CD_B REL1.0 iWave Systems Technologies Pvt. Ltd. Page 60 of 74...
  • Page 61 USB OTG1 USB1_TX_P USB1_TX_P USB1_TX_N USB1_TX_N USB1_RX_P USB1_RX_P USB1_RX_N USB1_RX_N PCIE_TXN_P PCIE_TXN_P PCIE_TXN_N PCIE_TXN_N PCIE_RXN_P PCIE_RXN_P PCIE_RXN_N PCIE_RXN_N PCIe USB2_OTG_ USDHC3_CD S146 GPIO1_IO14 PWM3_OUT CCM_CLKO1 GPIO1_IO14 USB1_OTG_ SDMA2_EXT GPIO1_IO12 GPIO1_IO12 _EVENT[1] REL1.0 iWave Systems Technologies Pvt. Ltd. Page 61 of 74...
  • Page 62 CORESIGHT_ NAND_DATA00 UART4_RX GPIO3_IO6 SAI3_RX_DATA0 RIG_0 TRACE04 Audio SAI0 SAI2_TX_DA SAI5_RX_DA GPT1_CAPT PDM_BIT_ST AH19 SAI3_TX_BCLK UART2_TX GPIO5_IO0 SAI3_TX_BCLK URE1 REAM2 SAI2_TX_DA SAI5_RX_DA SAI3_TX_DA PDM_BIT_ST AC16 SAI3_TX_SYNC UART2_RX GPIO4_IO31 SAI3_TX_SYNC REAM3 REL1.0 iWave Systems Technologies Pvt. Ltd. Page 62 of 74...
  • Page 63 AJ13 SAI1_TX_DATA7 SAI6_MCLK PDM_CLK GPIO4_IO19 GPIO4_IO19 ENET1_1588 P110 SAI1_RX_SYNC GPIO4_IO0 GPIO4_IO0 GPIO _EVENT0_IN ENET1_1588 P111 SAI1_RX_BCLK PDM_CLK _EVENT0_O GPIO4_IO1 GPIO4_IO1 SAI1_TX_DA PDM_BIT_ST ENET1_1588 P112 AC10 SAI1_RX_DATA0 GPIO4_IO2 GPIO4_IO2 REAM0 _EVENT1_IN REL1.0 iWave Systems Technologies Pvt. Ltd. Page 63 of 74...
  • Page 64 USDHC3_WP ECSPI1_SS0 GPIO5_IO17 I2C2_SDA 1_OUT ENET_QOS_ 1588_EVENT ISP_SHUTTE USDHC3_RE SDMA2_EXT P126 GPIO1_IO9 PWM2_OUT GPIO1_IO9 0_OUTPWM R_OPEN_1 SET_B _EVENT[0] Control Signal 2_OUT WDOG1_W ISP_FLASH_T WDOG1_W WDOG1_WDOG S145 GPIO1_IO2 DOG_B RIG_0 DOG_ANY REL1.0 iWave Systems Technologies Pvt. Ltd. Page 64 of 74...

  • Page 65: Technical Specification

    VDD_IN can be as low as 3.3V with sufficient current if fan is not used. i.MX 8M Plus SMARC SOM use this voltage as backup power source to RTC controller when VDD_IN is off. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 65 of 74...

  • Page 66: Power Input Sequencing

    VIN_PWR_BAD# rise time to SOM Power rise time ≥ 0 ms CARRIER_PWR_ON to CARRIER_STBY# timing ≥ 0 ms Carrier power circuits are up to RESET_OUT# rise ≥ 0 ms CARRIER_PWR_ON to CARRIER_RESET_OUT# timing 100 to 500ms REL1.0 iWave Systems Technologies Pvt. Ltd. Page 66 of 74...

  • Page 67: Power Consumption

    0.032A/0.16W RTC power when no VIN_3V3 supply is provided VRTC_3V0 0.0003A/0.0009W ¹ Power consumption measurements are done in iWave ’s i.MX 8M Plus SoC based SMARC Development platform with iWave’s iW-PRGQZ-SC-01-R2.0-REL1.0-Linux5.15.71 BSP. REL1.0 iWave Systems Technologies Pvt. Ltd. Page 67 of 74...

  • Page 68: Environmental Characteristics

    Heat pipes etc. Note: iWave supports Heat Sink/ Heat Spreader Solution for i.MX 8M Plus SMARC SOM. For more information on Heat Sink/ Heat Spreader contact iWave support team. Do not Power On the SOM without a proper thermal solution.

  • Page 69: Figure 8: I.mx 8M Plus Smarc Som Heat Sink Mechanical Dimensions

    8M Plus SMARC SOM Hardware User Guide Figure 8: i.MX 8M Plus SMARC SOM Heat Sink Mechanical Dimensions Figure 9: i.MX 8M Plus SMARC SOM Heat Spreader Mechanical Dimensions REL1.0 iWave Systems Technologies Pvt. Ltd. Page 69 of 74...

  • Page 70: Rohs Compliance

    3.2.4 Electrostatic Discharge iWave’s i.MX 8M Plus SMARC SOM is sensitive to electro static discharge and so high voltages caused by static electricity could damage some of the devices on board. It is packed with necessary protection while shipping. Do not open or use the SOM except at an electrostatic free workstation.

  • Page 71: Mechanical Characteristics

    GNSS module (2.6mm) & RTC Controller (1.75mm). In bottom side maximum height component is optional MIPI CSI Camera connector (2mm) followed by D11 diode (1.35mm). Figure 10: i.MX 8M Plus SMARC SOM Mechanical Dimensions REL1.0 iWave Systems Technologies Pvt. Ltd. Page 71 of 74...

  • Page 72: Ordering Information

    The below table provides the standard orderable part numbers for different i.MX 8M Plus SMARC SOM variants. Please contact iWave for orderable part number of higher RAM memory size or Flash memory size SOM configurations. Also, if the desired part number is not listed in below table or if any custom configuration part number is required, please contact iWave.

  • Page 73: Appendix

    8M Plus SMARC SOM Development Platform iWave Systems supports iW-RainboW-G40D-i.MX 8M Plus SMARC SOM Development Platform which is targeted for quick validation of i.MX 8M Plus SoC based SMARC SOM and its features. Being a Nano-ITX form factor with 120mm x 120mm size, the carrier board is highly packed with all necessary interfaces &...
  • Page 74 8M Plus SMARC SOM Hardware User Guide REL1.0 iWave Systems Technologies Pvt. Ltd. Page 74 of 74...

This manual is also suitable for:

I.mx 8m plusI.mx 8m plus quadI.mx 8m plus quadliteI.mx 8m plus dual

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