Basic Functionality; Fault Diagnostics - Analog Devices MAX25460 Manual

MAX25460 Evaluation Kit
Table 3. External Switch
POSITION
SW1 PIN
0
HVEN
1
0
ENBUCK
1
0
SYNC
0 with clock
applied to
SYNC through
J1
1
0
DATA_MODE
1

Basic Functionality

Connect a 9V to 16V power source (battery supply)
between VBAT_FLT and GND test loops and USB Micro-B
to a host PC. Connecting the Micro-B to a PC pulls the
HVEN pin to 3.3V and enables the device. The ENBUCK
pin is driven by the GUI and SW1 and must be high for
the DC-DC converter to turn on. The charge mode can be
2
configured through I C or using the DATA_MODE switch
or pin. If the DATA_MODE pin is high, it overrides the cur-
2
rent I C register setting.

Fault Diagnostics

The FAULT pin is software compatible with ADI Type-A
Automotive USB solutions. More advanced diagnostics
can be performed using the I
IRQ bits have an associated IRQ_MASK bit. When the
IRQ_MASK bit is set to 1, the INT pin asserts and de-
asserts following the IRQ bit. All IRQ bits clear on read.
IRQ bit de-assertion is controlled by the IRQ_AUTOCLR
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Device disabled
Device enabled
Buck output disabled
Buck output enabled
SYNC configured as an input:
DC-DC operates in FPWM.
Refer to the MAX25460 data sheet for more information.
SYNC configured as an output:
DC-DC operates in FPWM.
SYNC pin generates clock output for synchronization of other devices.
If enabled, spread spectrum is also present on SYNC output to reduce EMI of the device
synchronized to MAX25460. SYNC output is 180° out of phase with internal clock to further
help reduce EMI.
SYNC configured as an input:
DC-DC operates in FPWM.
The MAX25460 can be synchronized to an external clock - for example, another MAX25460.
Spread spectrum is not applied to external clock from SYNC pin.
SYNC configured as an input:
DC-DC operates in skip mode with light/no-load, FPWM otherwise.
High-speed pass-through mode (SDP)
Auto-CDP mode
2
C bus and the INT pin. The
Evaluates: MAX25460
DESCRIPTION
bit. When IRQ_AUTOCLR = 0 (default), the error bit stays
asserted until the register is read even if the fault condi-
tion is no longer present. When IRQ_AUTOCLR = 1, the
IRQ bit de-asserts without a read as soon as the fault
criteria are no longer met. The EV kit GUI uses a polling
mechanism to read all MAX25460 registers. A read is ini-
tiated when the Read All Registers button is clicked, or
periodically if auto read is enabled. Due to the auto read
polling mechanism, when IRQ_AUTOCLR = 1 it is pos-
sible that the GUI can miss IRQ bit assertions because
the signal de-asserts too quickly after a fault.
PCB Layout Guidelines
A good PCB layout is critical to proper system perfor-
mance. The loop area of the DC/DC conversion circuitry
must be minimized as much as possible. Place the input
capacitor, power inductor, and output capacitor very close
to the IC. Shorter traces should be prioritized over wider
traces.
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