Dallas Semiconductor MAXIM DS3112 Manual page 83

Tempe t3/e3 multiplexer 3.3v t3/e3 framer and m13/e13/g.747 mux
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Register Name:
Register Description:
Register Address:
Bit #
7
Name
RP7
Default
0
Bit #
15
Name
RP15
Default
0
Register Name:
Register Description:
Register Address:
Bit #
7
Name
RP23
Default
0
Bit #
15
Name
RP31
Default
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 31: BERT Repetitive Pattern Set (RP0 to RP31). RP0 is the LSB and RP31 is the MSB. These registers
must be properly loaded for the BERT to properly generate and synchronize to either a repetitive pattern, a
pseudorandom pattern, or a alternating word pattern. For a repetitive pattern that is less than 17 bits, then the
pattern should be repeated so that all 32 bits are used to describe the pattern. For example, if the pattern was the
repeating 5-bit pattern ...01101... (where rightmost bit is one sent first and received first) then BERTRP0 should
be loaded with xB5AD and BERTRP1 should be loaded with x5AD6. For a pseudorandom pattern, both registers
should be loaded with all ones (i.e., xFFFF). For an alternating word pattern, one word should be placed into
BERTRP0 and the other word should be placed into BERTRP1. For example, if the DDS stress pattern "7E" is to
be described, the user would place x0000 in BERTRP0 and x7E7E in BERTRP1 and the alternating word counter
would be set to 50 (decimal) to allow 100 bytes of 00h followed by 100 bytes of 7Eh to be sent and received.
BERTRP0
BERT Repetitive Pattern 0 (lower word)
74h
6
5
RP6
RP5
0
0
14
13
RP14
RP13
0
0
BERTRP1
BERT Repetitive Pattern 1 (upper word)
76h
6
5
RP22
RP21
0
0
14
13
RP30
RP29
0
0
4
3
RP4
RP3
0
0
12
11
RP12
RP11
0
0
4
3
RP20
RP19
0
0
12
11
RP28
RP27
0
0
83 of 133
2
1
RP2
RP1
0
0
10
9
RP10
RP9
0
0
2
1
RP18
RP17
0
0
10
9
RP26
RP25
0
0
DS3112
0
RP0
0
8
RP8
0
0
RP16
0
8
RP24
0

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