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Register Name:
Register Description:
Register Address:
Bit #
7
Name
EIB2
Default
—
Bit #
15
Name
AWC7
Default
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bit 0: Transmit Pattern Load (TC). A low to high transition loads the pattern generator with Repetitive or
Pseudorandom pattern that is to be generated. This bit should be toggled from low to high whenever the host
wishes to load a new pattern. Must be cleared and set again for a subsequent loads.
Bit 4: Single Bit Error Insert (SBE). A low to high transition will create a single bit error. Must be cleared and
set again for a subsequent bit error to be inserted.
Bits 5 to 7: Error Insert Bits (EIB0 to EIB2). Will automatically insert bit errors at the prescribed rate into the
generated data pattern. Useful for verifying error detection operation.
EIB2
EIB1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Bits 8 to 15: Alternating Word Count Rate (AWC0 to AWC7). When the BERT is programmed in the
alternating word mode, the word in BERTRP0 will be transmitted for the count loaded into this register plus one,
then flip to the other word loaded in BERTRP1 and again repeat for the same number of times. The valid count
range is from 00h to FFh.
AWC VALUE
00h
Send the word in BERTRP0 1 time followed by the word in BERTRP1 1 time...
01h
Send the word in BERTRP0 2 times followed by the word in BERTRP1 2 times...
02h
Send the word in BERTRP0 3 times followed by the word in BERTRP1 3 times...
06h
Send the word in BERTRP0 7 times followed by the word in BERTRP1 7 times...
07h
Send the word in BERTRP0 8 times followed by the word in BERTRP1 8 times...
FFh
Send the word in BERTRP0 256 times followed by the word in BERTRP1 256 times...
BERTC1
BERT Control Register 1
72h
6
5
EIB1
EIB0
0
0
14
13
AWC6
AWC5
0
0
EIB0
ERROR RATE INSERTED
0
No errors automatically inserted
-1
1
10
(1 error per 10 bits)
-2
0
10
(1 error per 100 bits)
-3
1
10
(1 error per 1kbits)
-4
0
10
(1 error per 10kbits)
-5
1
10
(1 error per 100kbits)
-6
0
10
(1 error per 1Mbits)
-7
1
10
(1 error per 10Mbits)
ALTERNATING COUNT ACTION
4
3
SBE
—
0
0
12
11
AWC4
AWC3
0
0
82 of 133
2
1
—
—
0
0
10
9
AWC2
AWC1
0
0
DS3112
0
TC
0
8
AWC0
0
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