Dallas Semiconductor MAXIM DS3112 Manual page 77

Tempe t3/e3 multiplexer 3.3v t3/e3 framer and m13/e13/g.747 mux
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Register Name:
Register Description:
Register Address:
Bit #
7
Name
Default
Bit #
15
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 4: T1/E1 Insert Port A Select Bits (IPAS0 to IPAS4).
Bits 8 to 12: T1/E1 Insert Port B Select Bits (IPBS0 to IPBS4).
These bits select if clock and data from either of the two insert ports (Insert Port A or Insert Port B) should replace
the clock and data presented at one of the 28 T1 ports or 16/21 E1 ports. If no port is selected, the clock and data
presented at the LTDATA, LTCLKA, LTDATB, and LTCLKB input pins is ignored. The same port should not be
selected for both Insert Port A and Insert Port B.
IPxS4:0
00000
No Port
00001
Port 1
00010
Port 2
00011
Port 3
00100
Port 4
00101
Port 5
00110
Port 6
00111
Port 7
T1E1SIP
T1/E1 Select Register for Transmit Insert Ports A and B
62h
6
5
14
13
01000
Port 8
01001
Port 9
01010
Port 10
01011
Port 11
01100
Port 12
01101
Port 13
01110
Port 14
01111
Port 15
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4
3
IPAS4
IPAS3
0
0
12
11
IPBS4
IPBS3
0
0
10000
Port 16
10001
Port 17
10010
Port 18
10011
Port 19
10100
Port 20
10101
Port 21
10110
Port 22
10111
Port 23
2
1
IPAS2
IPAS1
0
0
10
9
IPBS2
IPBS1
0
0
11000
Port 24
11001
Port 25
11010
Port 26
11011
Port 27
11100
Port 28
11101
No Port
11110
No Port
11111
No Port
DS3112
0
IPAS0
0
8
IPBS0
0

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Maxim ds3112+Maxim ds3112n

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