Register Name:
Register Description:
Register Address:
Bit #
7
Name
—
Default
—
Bit #
15
Name
—
Default
—
Note: Bits that are underlined are read-only; all other bits are read-write.
Bit 0: Loss Of Signal Occurrence (LOS).
0 = interrupt masked
1 = interrupt unmasked
Bit 1: Loss Of Frame Occurrence (LOF).
0 = interrupt masked
1 = interrupt unmasked
Bit 2: Alarm Indication Signal Detected (AIS).
0 = interrupt masked
1 = interrupt unmasked
Bit 3: Remote Alarm Indication Detected (RAI).
0 = interrupt masked
1 = interrupt unmasked
Bit 4: T3 Idle Signal Detected (T3IDLE).
0 = interrupt masked
1 = interrupt unmasked
Bit 5: Transmit T3/E3 Start Of Frame (TSOF).
0 = interrupt masked
1 = interrupt unmasked
Bit 6: Receive T3/E3 Start Of Frame (RSOF).
0 = interrupt masked
1 = interrupt unmasked
IT3E3SR
Interrupt Mask for T3/E3 Status Register
14h
6
5
RSOF
TSOF
0
0
14
13
—
—
—
—
4
3
T3IDLE
RAI
0
0
12
11
—
—
—
—
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2
1
AIS
LOF
0
0
10
9
—
—
—
—
DS3112
0
LOS
0
8
—
—