Measurement Computing CIO-DAS1601/12 Manual page 42

Digital Input / Output
Digital Type (Digital I/O connector)
Configuration
Number of channels
Output High
Output Low
Input High
Input Low
Digital Type (Main analog connector)
Output
Input
Configuration
Number of channels
Output High
Output Low
Input High
Input Low
Counter section
Counter type
Configuration
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width high
Gate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Environmental
Operating temperature range
Storage temperature range
Humidity
82C55 (not applicable on -P5 versions)
2 banks of 8, 2 banks of 4, programmable by bank as input
or output
24 I/O
3.0 volts min @ -2.5 mA
0.4 volts max @ 2.5 mA
2.0 volts min, 5.5 volts absolute max
0.8 volts max, -0.5 volts absolute min
74LS197
74LS244
4 fixed input, 4 fixed output
8
2.7 volts @ -0.4 mA min
0.5 volts @ 8 mA max
2.0 volts min, 7 volts absolute max
0.8 volts max, -0.5 volts absolute min
82C54
3 down-counters, 16 bits each
Counter 0 - Independent, user configurable
Source: Programmable - Internal 100 kHz or external (CTR0 Clock In)
Gate: External (DIn2)
Output: Available at user connector (CTR0 Out)
Counter 1 - ADC Pacer Lower Divider
Source: 1 or 10 MHz oscillator (jumper selectable)
Gate: Tied to Counter 2 gate, programmable source.
Output: Chained to Counter 2 Clock.
Counter 2 - ADC Pacer Upper Divider
Source: Counter 1 Output.
Gate: Tied to Counter 1 gate, programmable source.
Output: ADC Pacer clock
10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
0.8V max
2.0V min
0.4V max
3.0V min
0 to 50°C
-20 to 70°C
0 to 90% non-condensing
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