1 INTRODUCTION The CIO-DAS6402/16 and CIO-DAS6402/12 provide 32 differential or 64 single-ended inputs. They have sample rates as high as 330 kHz (100 kHz for the 16-bit version). Using a 100-pin connector, the CIO-DAS6402 board provides large channel counts without the need for external expansion boards.
D/A OUTPUT RANGE SWITCH (CIO-DAS6402/16 ONLY) The analog output ranges of the CIO-DAS6402/12 are set via software. The analog output ranges of the CIO-DAS6402/16 are set by dip switches on the board (Figure 3-7). Figure 3-2 shows the the allowable switch settings and Table 3-1 gives the range/switch settings.
(S H O W N IN S IM U LTA N E O U S U P D ATE M O D E ) Figure 3-5. D/A Update Mode Select Jumper Base Address Switch Figure 3-6. CIO-DAS6402/12 Base Address Switches Location...
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D/A Range and Mode Selection Switches Update Mode Select Jumper Base Address Switch Figure 3-7. CIO-DAS6402/16 Base Address, D/A Range & Mode Switches Location...
CONNECTOR PIN-OUT The CIO-DAS6402 analog connector (Figure 3-8) is a 100 pin high-density connector accessible from the rear of the PC through the expansion back plate. The connector interfaces with the C100FF-2, a two-foot cable. This cable connects directly to the CIO-TERM100 screw terminal board.
4 ANALOG CONNECTIONS ANALOG INPUTS The following section provides explanations and helpful hints regarding analog input connections. This section is designed to help you achieve the optimum performance from your CIO-DAS6402 series board. Prior to jumping into actual connection schemes, you should have at least a basic understanding of Single-Ended/Differential inputs and system grounding/isolation.
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Differential Inputs Differential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as the common mode range), the measurement is almost independent of signal source to CIO-DAS6402 ground variations. A differential input is also much more immune to EMI than a single-ended one.
+13V Gray area represents com m on m ode range +12V Both V+ and V- m ust alw ays rem ain w ithin the com m on m ode range relative to LL Gnd +11V +10V W ith Vcm = +5VD C, +Vs m ust be less than +5V, or the com m on m ode range will be exceeded (>+10V) -10V -11V...
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CIO-DAS6402. This is especially true if you are using either the CIO-DAS6402/16 or the CIO-DAS6402/12 at high gains, since ground potentials in the sub millivolt range will be large enough to cause A/D errors, yet will not likely be measured by your handheld voltmeter.
NOTE Do not rely on the earth prong of a 120VAC receptacle for signal ground connections. Different ground plugs may have large and potentially even dangerous voltage differentials. Remember that the ground pins on 120VAC outlets on different sides of the room may only be connected in the basement. This leaves the possibility that the “ground”...
4.2.1 COMMON GROUND / SINGLE-ENDED INPUTS Single-ended is the recommended configuration for common ground connections. However, if some of your inputs are common ground and some are not, we recommend you use the differential mode. There is no performance penalty (other than loss of channels) for using a differential input to measure a common ground signal source.
C H H igh G N D In p ut To A /D A m p C H L ow LL G N D T he v olta ge d iffe ren tia l A /D B o ard b e tw ee n th e se gro un ds , C o n n ec tor a d de d to th e m a xim u m in p ut sig n a l m ust sta y...
12-bits of resolution). It provides a value of 2.5V when the value in the output register is 2048. The output ranges of the CIO-DAS6402/12 are set by software. The output ranges of the CIO-DAS6402/16 are set by dip switch. Please refer to Section 3 for information regarding setting these switches.
5 REGISTER ARCHITECTURE INTRODUCTION The CIO-DAS6402 is controlled and monitored by reading and writing to 16 I/O addresses. The first address is referred to as the BASE ADDRESS and is set by a bank of switches on the board. All other addresses are located at the BASE ADDRESS plus a specified offset.
Table 5-2. DAS6402 I/O Map - ENHANCED Mode (BOLD indicates register definition for DAS6402/16) ADDRESS READ FUNCTION WRITE FUNCTION BASE A/D bits 0(LSB) -11 (MSB) (Word) Software Start A/D Conversion BASE A/D bits 0(LSB) -15 (MSB) (Word) Software Start A/D Conversion BASE + 1 Do not use, use BASE only None...
A/D DATA WORD REGISTER - 16 BIT BASE + 0 Example, 300h, 768 Decimal READ/WRITE Mode ENHANCED AD15 AD14 AD13 AD12 AD11 AD10 COMPATIBLE AD15 AD14 AD13 AD12 AD11 AD10 READ On read, the 16-bit ADC value is presented in 'left-justified' format, with the most-significant ADC bit occupying the data word bit position #15;...
8-BIT DIGITAL I/O REGISTERS BASE ADDRESS +3 Example, 303h, 771 Decimal READ GATE0 XTRIG XPACER The signals present at the 8 digital inputs are read as one byte. Three of the pins have special functions in addition to digital input.: XPACER/DI0 External Pacer: Starts an A/D Conversion on each active edge.
6402/12 Each 12 bit D/A output line has two 8-bit registers. The first contains the four least-significant bits of the data and four 'don't-care' bits. The second register contains the eight most significant bits of the data. Data can be written as two successive bytes or as one word. When two bytes are written, the lower address byte must be written first, and then the higher byte, as the DAC output is updated when the higher byte is written.
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SEDIFF - Analog input channel configuration, 0 = differential, 1 = single ended. MA3:0 - Analog input channel mux setting (for next conversion). WRITE 1/10MHz POSTMODE ARMED EXTEND CLRXIN CLRXTR CLRINT ENHANCED MODE: The write functions of the status register are to clear certain flip-flop states, and set the Pacer clock to 1 or 10 MHz. CLRINT - Clear Interrupt flip-flop when = 1.
COMPATIBLE MODE: Write to Base + 8 only clears the interrupt flip-flop (sets CLRINT only (= 1)). INTERRUPT AND PACER CONTROL REGISTER BASE ADDRESS +9 Example, 309h, 777 Decimal READ/WRITE INTE HC_IS2 HC_IS1 HC_IS0 XINTE BURSTE HC_PS1 HC_PS0 INTE HC_IS2 HC_IS1 HC_IS0 XINTE...
TRIGGER CONTROL/ DAC RANGE SELECT REGISTER Triggering and Gating are digital means to control pacing. Triggering means that an active edge on the DI1 pin will start the A/D Pacer. When the active edge occurs, the state of the pin is Don't Care. Gating means that a digital level on the DI1 pin will start or stop the A/D Pacer;...
COMPATIBLE MODE: TRIG0: Trigger/Gate Enable bit When = 1, Enables DIN0 input to gate the pacer (external trigger/gate). When = 0, Enables pacer gate preventing external trigger/gate control. CTR0: Counter 0 input control When = 1, 100 khz input to counter 0 if external counter 0 input is pulled high (or unconnected since the pin is internally pulled high).
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Table 5-7. Comparison of Features: Compatible vs. Enhanced Mode Feature MODE Compatible Enhanced # Analog Input Channels 16 S-E 64 S-E 8 Diff 32 Diff # Digital I/O 4 in 8 in 4 out 8 out External Triggering Combined w/ Pacing on DIN1, gate Separate from Pacing, uses DIN1.
5.10 PACER CLOCK DATA AND CONTROL REGISTERS 8254 COUNTER 0 DATA - POST TRIGGER CONVERSION COUNTER BASE + 12 Example, 30Ch, 780 decimal READ/WRITE Counter 0 is used to count conversions to stop the acquisition when a known number of samples have occurred. It essentially is gated on when only a 'residual' number of conversions remain.
6 CALIBRATION AND TEST Every board was fully tested and calibrated before being placed in finished goods inventory at the factory. For normal environments a calibration interval of 6 months to one year is recommended. If frequent variations in temperature or humidity are common then recalibrate at least once every three months.
R1 = (A-1) x R2 For a given attenuation, pick a resistor and call it R2, the use this formula to calculate R1. Digital inputs often require the use of voltage dividers. For example, if you wish to measure a digital signal that is at 0 volts when off and 24 volts when on, you cannot connect that directly to a digital input.
8 SPECIFICATIONS CIO-DAS6402/16 Typical for 25 DegC unless otherwise specified. Power consumption Icc: Operating 1.17 A typical, 1.67 A max Analog input section A/D converter type AD976A, successive-approximation Resolution 16 bits Programmable ranges ±10V, ±5V, ±2.5V, ±1.25V, 0 to 10V, 0 to 5V, 0 to 2.5V, 0 to 1.25V A/D pacing Programmable: internal counter or external source (DIN0, rising edge) Data transfer...
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Analog Output Resolution 16 bits Number of channels 2 Voltage Outputs D/A type AD660BN Voltage Ranges ±2.5, ±5, ±10, 0 to 2.5, 0 to 5, 0 to 10, switch-selectable Offset error Adjustable to zero by potentiometer Gain error Adjustable to zero by potentiometer Differential nonlinearity ±1LSB max Integral nonlinearity...
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Counter section Counter type 82C54 Configuration 3 down-counters, 16 bits each Counter 0 Compatible mode - Independent Source: Programmable external (CTR0 CLK) or 100 kHz internal source). Gate: Available at connector (DIN2). Output: Available at connector (CTR0 OUT). Enhanced mode - ADC residual sample counter Source: ADC Clock.
CIO-DAS6402/12 Typical for 25°C unless otherwise specified. Power consumption Icc: Operating 1.05 A typical, 1.6 A max Analog input section A/D converter type ADS7800, Successive Approximation Resolution 12 bits Programmable ranges ±10V, ±5V, ±2.5V, ±1.25V, 0 to 10V, 0 to 5V, 0 to 2.5V, 0 to 1.25V...
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Analog Output: Resolution 12 bits Number of channels 2 Voltage Output D/A type AD7237 Voltage Ranges ±10V, ±5V, 0 to 5V, 0 to 10V. Software-programmable Offset error Adjustable to zero by potentiometer Gain error Adjustable to zero by potentiometer Differential nonlinearity ±1LSB max Integral nonlinearity ±1LSB max...
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Counter section Counter type 82C54 Configuration 3 down-counters, 16 bits each Counter 0 Compatible mode - Independent Source: Programmable external (CTR0 CLK) or 100kHz internal source). Gate: Available at connector (DIN2). Output: Available at connector (CTR0 OUT). Enhanced mode - ADC residual sample counter Source: ADC Clock.
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EC Declaration of Conformity We, Measurement Computing Corp., Inc., declare under sole responsibility that the product: CIO-DAS6402/12 12-Bit Analog I/O Board CIO-DAS6402/16 16-Bit Analog I/O Board Part Number Description to which this declaration relates, meets the essential requirements, is in conformity with, and CE marking has been applied according to the relevant EC Directives listed below using the relevant section of the following EC standards and other normative documents: EU EMC Directive 89/336/EEC: Essential requirements relating to electromagnetic compatibility.
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