Cio-Das1602/16 - Measurement Computing CIO-DAS1601/12 Manual

Analog & digital i/o board for isa bus
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Counter section
Counter type
Configuration
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width high
Gate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Environmental
Operating temperature range
Storage temperature range
Humidity
Weight
9.2

CIO-DAS1602/16

Power consumption
+5
Analog input section
A/D converter type
Resolution
Programmable ranges
A/D pacing
Burstmode
Data transfer
Polarity
82C54
3 down-counters, 16 bits each
Counter 0 - Independent, user configurable
Source: Programmable - Internal 100 kHz or external (CTR0 Clock In)
Gate:
External (DIn2)
Output: Available at user connector (CTR0 Out)
Counter 1 - ADC Pacer Lower Divider
Source: 1 or 10 MHz oscillator (jumper selectable)
Gate:
Tied to Counter 2 gate, programmable source.
Output: Chained to Counter 2 Clock.
Counter 2 - ADC Pacer Upper Divider
Source: Counter 1 Output.
Gate:
Tied to Counter 1 gate, programmable source.
Output: ADC Pacer clock
10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
0.8V max
2.0V min
0.4V max
3.0V min
0 to 50°C
−20 to 70°C
0 to 90% non-condensing
11.2 oz. (320g)
1.4 A typical, 2.1 A max
ADS7805 successive approximation
16 bits
±10V, ±5V, ±2.5V, ±1.25V, 0 to 10V, 0 to 5V, 0 to 2.5V,
0 to 1.25V
Programmable: external source (Din0, positive edge) or
internal counter (positive or negative edge, jumper-select
able) or software-polled
13.3 µs
From 512-sample FIFO via interrupt, DMA, DT-Connect to
external memory board or software polled
Unipolar/Bipolar, switch selectable
36

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