Advantech ROM-5721 User Manual page 17

Risc-based smarc 2.0/2.1 module with nxp i.mx8 arm cortex a53 processor
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S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
S55
S56
S57
S58
S59
S60
S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
<Key>
S76
S77
S78
S79
S80
S81
S82
S83
CSI0_CK-
GND
CSI0_RX0+
CSI0_RX0-
GND
CSI0_RX1+
CSI0_RX1-
GND
GBE1_MDI0+
GBE1_MDI0-
GBE1_LINK100#
GBE1_MDI1+
GBE1_MDI1-
GBE1_LINK1000#
GBE1_MDI2+
GBE1_MDI2-
GND
GBE1_MDI3+
GBE1_MDI3-
GBE1_CTREF
PCIE_D_TX+
PCIE_D_TX-
GBE1_LINK_ACT#
PCIE_D_RX+
PCIE_D_RX-
GND
USB4+
USB4-
USB3_VBUS_DET
AUDIO_MCK
I2S0_LRCK
I2S0_SDOUT
I2S0_SDIN
I2S0_CK
ESPI_ALERT0#
ESPI_ALERT1#
RSVD
RSVD
GND
I2C_GP_CK
I2C_GP_DAT
HDA_SYNC / I2S2_LRCK
HDA_SDO / I2S2_SDOUT
HDA_SDI / I2S2_SDIN
HDA_CK / I2S2_CK
SATA_ACT#
USB5_EN_OC#
ESPI_IO_2
ESPI_IO_3
ESPI_RESET#
USB5+
USB5-
GND
USB3_SSTX+
USB3_SSTX-
GND
USB3_SSRX+
USB3_SSRX-
GND
USB3+
USB3-
GND
USB2_SSTX+
USB2_SSTX-
GND
USB2_SSRX+
USB2_SSRX-
<Key>
PCIE_B_RST#
PCIE_C_RST#
PCIE_C_RX+
PCIE_C_RX-
GND
PCIE_C_TX+
PCIE_C_TX-
GND
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
USBDN4_DP
USBDN4_DM
NA
SAI1_MCLK
SAI1_LRCK
SAI1_SDOUT
SAI1_SDIN
SAI1_CK
NA
NA
NA
NA
I2C4_SCL
I2C4_SDA
SAI6_LRCK
SAI6_SDOUT
SAI6_SDIN
SAI6_CK
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
USBDN1_DP
USBDN1_DM
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA

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