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3.Pin function
Pin No.
Symbol
43
MD
44
VDDIO
45, 46
MD
47
VSS
48
MD
49
VSSIO
50-52
MD
53
VDDIO
54, 55
MD
56
MD
57
VSSIO
58-61
MD
62
VDDIO
63, 64
MD
65
DQM
66
CS1
67
VSSIO
68
SPDIF
69
VSS
70
AIN
71
AOUT3
72
AOUT2
73
AOUT1
74
AOUT0
75
VDDIO
76
PCMCLK
77
VDD
78
ACLK
79
LRCLK
80
SRST
81
RSTP
82
VSSIO
83
RXD1
84
SSPIN1/BAUD1
85
VSS
86
SSPOUT1/DTR1
87
SSPCLK1/CTS1
88
SSPCLK0/RTS1
89
VDD
90
SSPIN0/BAUD0
91
VDDIO
92
SSPOUT0/DTR0
93
TXD0
94
RXD0
95
CTS0
96
RTS0
97
VSSIO
98
CXI
99
CXO
100
OSCVSS
101
OSCVDD
102
MVCKVDD
103
SCEN
104
MVCKVSS
105
ACLKVSS
106
SCMD
107
ACLKVDD
I/O
I/O
SDRAM data bus
I/O pad power =3.3V
I/O
SDRAM data bus
Core and Ring ground
I/O
SDRAM data bus
I/O pad ground
I/O
SDRAM data bus
I/O pad power =3.3
I/O
VSDRAM data bus
I/O
SDRAM data bus
I/O pad ground
I/O
SDRAM data bus
I/O pad power =3.3V
I/O
SDRAM data bus
O
SDRAM data byte enables
O
SDRAM extension bank chip select
I/O pad ground
O
S/PDIF digital audio output
Core and Ring ground
I
Digital audio input for digital micro
O
Serial audio output data to audio DAC for Lch and Rch for down-mixed stereo
O
Serial audio output data to audio DAC for SLch and SRch
O
Serial audio output data to audio DAC for Cch and LFEch
O
Serial audio output data to audio DAC for Lch and Rch
I/O pad power =3.3V
O
Audio DAC PCM sampling click frequency, common clock for DACs and ADC
Core power =1.8V
O
Audio interface serial data clock, common clock for DACs and ADC
O
L/R channel clock, common clock for DACs and ADC
O
Active low RESET signal for peripheral reset
I
RESET input pin form system
I/O pad ground
I
UART1 serial data input from external serial devise
I/O
SSP1 data in or 16X clock for USART function in UART1
Core and Ring ground
I/O
SSP1data out or UART1 data-terminal-ready signal
I/O
SSP1clock or UART1 clear-to-send signal
I/O
SSP0 clock or request-to-send function in UART1
Core power =1.8V
I/O
SSP0 data in or 16X clock for USART function in UART0
I/O pad power =3.3V
I/O
SSP0 data out or UART0 data-terminal-ready signal
I/O
UART0 serial data output to an external serial device
I
UART0 serial data input from external serial device
I/O
UART0 clear-to-send signal
I/O
UART0 request-to-send signal
I/O pad ground
I
Crystal input pin for on-chip oscillator or system input clock
O
Crystal output pin for on-chip oscillator
Oscillator ground
Oscillator power
Main and video clock PLL power
I
Scan chain test enable
Main and video clock PLL ground
Audio clock PLL ground
I
Scan chain test mode
Audio clock PLL power
Function
RX-DV5RSL
(2/4)
1-29
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