SOLTEK SL-75KIV User Manual page 64

75KIV
DRAM Timing by SPD When this item is Enabled, DRAM Timing is set by
SPD
SPD (Serial Presence Detect) is located on the
memory modules, BIOS reads information coded in
SPD during system boot up.
DRAM Clock The value represents the performance parameters of
the installed memory chips (DRAM). Do not change
the value from the factory setting unless you install
new memory that has a different performance rating .
SDRAM Cycle Length Select CAS latency time in HCLKs of 2 or 3. The sys-
tem designer already set the values. Do not change
the default value unless you change specifications of
the installed DRAM or the installed CPU.
Bank Interleave Please use default setting.
The choices: Disabled; 2 Bank; 4 Bank.
DRAM Drive Strength Leave this item at Auto mode.
The choices: Auto; Manual.
DRAM Drive Value When "DRAM Drive Strength" is set to "Auto", this
item will be unable to be selected. We don't recom-
mend user to adjust this item.
Memory Hole In order to improve performance, certain space in
memory is reserved for ISA cards. This memory must
be mapped into the memory space below 16MB.
The choices: 15M-16M; Disabled.
PCI Master Pipeline Please use default setting.
Req
P2C/C2P Concurrency This item allows you to enable/disable the PCI to CPU,
CPU to PCI concurrency.
The choices: Enabled; Disabled.
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