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Maintenance
The following table lists the files which can be upgraded for INFORMA PMD-A.
Application
CPU_Application
DSP
FPGA
FPGA_HI_A
PIC
MMI
b. After browsing the appropriate file, click on "Send" button. When the file is sent
successfully, a success message error_string=SUCCESS is displayed.
c. Repeat above procedure for all files to be upgraded in device.
d. Scroll down webpage and go to " TOGGLE_ALL"section, click the respective check box for
which you have browsed and send files to device and then click on "ToggleAll" button. This
process will upgrade to all newly sent firmware version executables/applications to the
INFORMA PMD-A device. After clicking "ToggleAll" button device will be automatically
restarted .
e. Wait until the Healthy LED glows on the front panel of the device.
12. Only if necessary, for upgrading CPU-Kernel, click on "
locate the "ulmage_x.y_with_crc" file, and then click on Send button. On receiving the
confirmation that the file is sent successfully, click the Toggle button for the "CPU-
kernel",. After clicking "Toggle" button device will be automatically restarted .Wait until
the Healthy LED glows on the front panel of INFORMA PMD-A device.
Note
The user can toggle multiple applications by selecting the respective check
boxes provided in the TOGGLEALL section.
The subsequent pages show the updating processes involved after the device is
successfully upgraded. The user can then check for new versions through the System and
Diagnostic Information pages that are displayed.
If the user is using a modem, then the file transfer rate may be very slow. For example, the
CPU_Application may take up to 1 hour 45 minutes to upload the initrd_wthcrcPx.yz file,
which is at least 17MB.
After the application file is sent, it needs to be toggled for the new file to take effect. If the
person upgrading the device has left the computer unattended for a long time, then the
modem connection might be dropped because of no activity on the line. The default modem
inactive time is 66 seconds.
File to be Selected
initrd_CMxx.yy_Azz_with_crc.bin CPU_APP
dsp_bank1.bin
fpga_bank1.bin
fpgaHiAfe_bank1.bin
pic_bank1.bin
mmi_bank1.bin
128
Check Box
DSP
FPGA
FPGA_HI_A
PIC
MMI
CPU-Kernel"
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