Hardware Schematic Diagrams - Xilinx Virtex-5 FPGA ML550 User Manual

Chapter 3: Hardware Description

Hardware Schematic Diagrams

24
Downloaded from Elcodis.com electronic components distributor
•
A 64-step electronic contrast control function
Table 3-4 summarizes the controller specifications.
Table 3-4: Display Controller Specifications
Parameter
Supply Voltage 2.4V to 3.6V (V
LCD Driving Voltage 4V to 15V (V
Power Consumption 70 µA typical
(V
Sleep Mode 2 µA
Standby Mode 10 µA
Figure 3-3 shows the schematic for connections to the display.
diagram of the display, and
DB[7:0]
E, R/W, RS, CS1B
FPGA
RST
LCD_BL_ON
Figure 3-3: Display Schematic Diagram
www.xilinx.com
Specification
)
DD
= V – V ) Generated On-Chip
LCD 0 DD
= 3V, x4 boost, V = 11V, internal supply = ON)
DD 0
Figure 3-5 shows the dimensions of the display.
RST
3.3V
Default =
Resistor to GND
Backlight ON/OFF
ML550 Networking Interfaces Platform
Figure 3-4 shows a block
Backlight
LED
− +
MI V GND
CC
3.3V
3.3V
68xx
8080
Default = 68xx
ug202_3_03_031106
UG202 (v1.4) April 18, 2008
R