Ml550 Board System Monitor Support Circuitry Details; 5V Input Power Voltage Monitor - Xilinx Virtex-5 FPGA ML550 User Manual
Networking interfaces platform
Hide thumbs
Also See for Virtex-5 FPGA ML550:
- User manual (385 pages) ,
- User manual (140 pages) ,
- User manual (108 pages)
Table of Contents
Advertisement
Chapter 3: Hardware Description
ML550 Board System Monitor Support Circuitry Details
36
Downloaded from
Elcodis.com
electronic components distributor
Figure 3-12
through
device, and pin number the indicated signal connects:
S#,Des.P#
where:
•
S# is the schematic sheet number (for example, 19)
•
Des is the device reference designator (for example, U20)
•
P# is the device pin number (for example, V18)
5V Input Power Voltage Monitor
The signal conditioning network is shown in
1
C305
0.1µF
2
Figure 3-12: 5V Input Power Voltage Monitor (Sheet 19)
Figure 3-21
use the following format to show to which schematic,
Figure
VCC5_SYSMON_TAP
2
R282
R283
9.09K
1
1.0K
1
2
2
R285
R287
1.0K
1
1.0K
1
2
D
A
www.xilinx.com
3-12.
19,U10.1
VCC5V_MON_SM9P
1
C304
0.01µF
2
VCC5V_MON_SM9N
ML550 Networking Interfaces Platform
UG202 (v1.4) April 18, 2008
R
34,U9.U32
34,U9.U31
UG202_3_12_041408
Advertisement
Table of Contents
