Operating The Adpa1107-Evalz With The Drain Bias Pulser Board - Analog Devices ADPA1107-EVALZ User Manual

ADPA1107-EVALZ

OPERATING THE ADPA1107-EVALZ WITH THE DRAIN BIAS PULSER BOARD

The ADPA1107-EVALZ ships with a drain bias pulser board. A
block diagram of the pulser board is shown in Figure 4. The pulser
board has two primary components. The IRFZ48NSTRLPBF is
an 55 V/64 A, metal-oxide semiconductor field effect transistor
(MOSFET) that switches the drain voltage to the ADPA1107
Table 3. J1 to J5, TP1 to TP4, P1, and P2 Pulser Board Connections to the ADPA1107
Header Header Pin Number
J1 Not applicable
J2 Not applicable
J3 Not applicable
J4 Not applicable
J5 Not applicable
VREFBIAS Not applicable
VREF Not applicable
VDET Not applicable
VDETBIAS Not applicable
P1 1
2
3, 5, 7, 9, 10, 11, 12, 13, 14, 15, 17, 19, 21, 22, 23, 24
4, 6, 8
16, 18, 20
P2 1, 2, 3, 4, 5, 7, 9 ,11, 12, 13, 14, 15, 16, 17, 19, 21
6, 8, 10
18, 20, 22
23
24
User Guide
on and off, and the MIC5021YN is a high-side, MOSFET, static
switch driver that controls the IRFZ48NSTRLPBF MOSFET.
The pulser board plugs into the J3 and J4 headers of ADPA1107-
EVALZ and can be configured to provide a pulsed drain voltage
and a negative gate control voltage to control the biasing of the
ADPA1107.
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Header Pin Name
VDD
SENSE
VG1
Pulse
PULSED_VDD
VREFBIAS
VREF
VDET
VDETBIAS
VDET
VDET_BIAS
GND
PULSED_VDD
VG1
GND
VG1
PULSED_VDD
VREF
VREF_BIAS
UG-1962