Analog Devices ADT7473 Manual page 70

Dbcool remote thermal monitor and fan controller
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ADT7473
Table 45. Register 0x75—Interrupt Mask Register 2 (Power-On Default <7:0> = 0x00)
Bit
Name
R/W
1
OVT
Read only
2
FAN1
Read/write
3
FAN2
Read/write
4
FAN3
Read/write
5
F4P
Read/writ
6
D1
Read/write
7
D2
Read/write
Table 46. Register 0x76—Extended Resolution Register 1
Bit
Name
R/W
<3:2>
V
Read-only
CCP
<5:4>
V
Read-only
CC
1
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 47. Register 0x77—Extended Resolution Register 2
Bit
Name
R/W
<3:2>
TDM1
Read-only
<5:4>
LTMP
Read-only
<7:6>
TDM2
Read-only
1
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 48. Register 0x78—Configuration Register 3 (Power-On Default = 0x00)
1
Bit
Name
R/W
<0>
ALERT
Read/write
<1>
THERM
Read/write
<2>
BOOST
Read/write
<3>
FAST
Read/write
<4>
DC1
Read/write
<5>
DC2
Read/write
<6>
DC3
Read/write
<7>
DC4
Read/write
1
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect.
Description
OVT = 1, masks SMBALERT for overtemperature THERM conditions.
FAN1 = 1, masks SMBALERT for a Fan 1 fault.
FAN2 = 1, masks SMBALERT for a Fan 2 fault.
FAN3 = 1, masks SMBALERT for a Fan 3 fault.
F4P = 1, masks SMBALERT for a Fan 4 fault. If the TACH4 pin is being used as the THERM input, this
bit masks SMBALERT for a THERM timer event.
D1 = 1, masks SMBALERT for a diode open or short on a Remote 1 channel.
D2 = 1, masks SMBALERT for a diode open or short on a Remote 2 channel.
1
Description
V
LSBs. Holds the 2 LSBs of the 10-bit V
CCP
V
LSBs. Holds the 2 LSBs of the 10-bit V
CC
1
Description
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature measurement.
Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature measurement.
Description
ALERT = 1, Pin 5 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-
limit error conditions.
THERM Enable = 1 enables THERM functionality on Pin 9. Also determined by Bits 0 and 1 (PIN9FUNC) of
Configuration Register 4. Direction is controlled by bits 5, 6 and 7 of Configuration Register 5 (0x7C).
When THERM is asserted, if the fans are running and the boost bit is set, the fans run at full speed. THERM
can also be programmed so that a timer monitors the duration THERM has been asserted.
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the maximum
programmed duty cycle for fail-safe cooling.
FAST = 1, enables fast TACH measurements on all channels. This increases the TACH measurement rate
from once per second to once every 250 ms (4 ×).
DC1 = 1, enables TACH measurements to be continuously made on TACH1. Fans must be driven by dc.
Setting this bit prevents pulse stretching, because it is not required for DC-driven motors.
DC2 = 1, enables TACH measurements to be continuously made on TACH2. Fans must be driven by dc.
Setting this bit prevents pulse stretching, because it is not required for DC-driven motors.
DC3 = 1, enables TACH measurements to be continuously made on TACH3. Fans must be driven by dc.
Setting this bit prevents pulse stretching, because it is not required for DC-driven motors.
DC4 = 1, enables TACH measurements to be continuously made on TACH4. Fans must be driven by dc.
Setting this bit prevents pulse stretching, because it is not required for DC-driven motors.
Rev. 0 | Page 70 of 76
measurement.
CCP
measurement.
CC

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