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ADT7473
THERM
TIMER LIMIT
(REG. 0x7A)
Configuring the THERM Pin as Bidirectional
In addition to monitoring THERM as an input, the ADT7473
can optionally drive THERM low as an output. When
PROCHOT is bidirectional, THERM can be used to throttle the
processor by asserting PROCHOT . The user can preprogram
system-critical thermal limits. If the temperature exceeds a
thermal limit by 0.25°C, THERM asserts low. If the temperature
is still above the thermal limit on the next monitoring cycle,
THERM stays low. THERM remains asserted low until the
temperature is equal to or below the thermal limit. Because the
temperature for that channel is measured only once for every
monitoring cycle after THERM asserts, it is guaranteed to
remain low for at least one monitoring cycle.
The THERM pin can be configured to assert low, if the
Remote 1, local, or Remote 2 THERM temperature limits are
exceeded by 0.25°C. The THERM temperature limit registers
are at Registers 0x6A, 0x6B, and 0x6C, respectively. Setting
Bits 5, 6, and 7 of Configuration Register 5 (0x7C) makes
THERM bidirectional for the Remote 1, local, and Remote 2
temperature channels, respectively. Figure 31 shows how the
THERM pin asserts low as an output in the event of a critical
overtemperature.
2.914s
1.457s
728.32ms
364.16ms
182.08ms
91.04ms
45.52ms
22.76ms
2
6
7
0
1
3
4
5
COMPARATOR
Figure 30. Functional Block Diagram of ADT7473's THERM Monitoring Circuitry
7 6 5 4 3 2 1 0
F4P BIT (BIT 5)
IN
OUT
STATUS REGISTER 2
LATCH
RESET
CLEARED
1 = MASK
ON READ
F4P BIT (BIT 5)
MASK REGISTER 2
(REG. 0x75)
THERM LIMIT
0.25°C
THERM LIMIT
THERM
An alternative method of disabling THERM is to program the
THERM temperature limit to –64°C or less in Offset 64 mode,
or −128°C or less in twos complement mode; that is, for
THERM temperature limit values less than –63°C or –128°C,
respectively, THERM is disabled. THERM can also be disabled
by setting Bit 1 of Configuration Register 3 (0x78) to 0.
Rev. 0 | Page 24 of 76
2.914s
1.457s
728.32ms
364.16ms
THERM TIMER
(REG. 0x79)
182.08ms
91.04ms
45.52ms
22.76ms
THERM
THERM TIMER CLEARED ON READ
SMBALERT
TEMP
MONITORING
CYCLE
Figure 31. Asserting THERM as an Output,
Based on Tripping THERM Limits
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