Fan Presence Detect; Sleep States - Analog Devices ADT7473 Manual

ADT7473
Fan Speed Control
The ADT7473 controls fan speed using automatic and manual
modes.
In automatic fan speed control mode, fan speed is automatically
varied with temperature and without CPU intervention, once
initial parameters are set up. The advantage of this is that, if the
system hangs, the user is guaranteed the system is protected
from overheating. The automatic fan speed control incorporates
a feature called dynamic T
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the design effort required to program the automatic fan speed
control loop. For more information and procedures on how to
program the automatic fan speed control loop and dynamic
T calibration, see the Programming the Automatic Fan Speed
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Control Loop section.
In manual fan speed control mode, the ADT7473 allows the
duty cycle of any PWM output to be manually adjusted. This
can be useful if the user wants to change fan speed in software
or adjust PWM duty cycle output for test purposes. Bits <7:5>
of Reg. 0x5C to Reg. 0x5E (PWM Configuration) control the
behavior of each PWM output.
PWM Configuration Registers (Reg. 0x5C to Reg. 0x5E)
<7:5> BHVR
111 = manual mode.
Once under manual control, each PWM output can be manu-
ally updated by writing to Reg. 0x30 to Reg. 0x32 (PWMx
current duty cycle registers).
Programming the PWM Current Duty Cycle Registers
The PWM current duty cycle registers are 8-bit registers that
allow the PWM duty cycle for each output to be set anywhere
from 0% to 100% in steps of 0.39%.
The value to be programmed into the PWM
Value (decimal) = PWM
Example 1 : For a PWM duty cycle of 50%,
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 0x80 (hex)
Example 2 : For a PWM duty cycle of 33%,
Value (decimal) = 33/0.39 = 85 (decimal)
Value = 85 (decimal) or 0x54 (hex)
PWM Duty Cycle Registers
Reg. 0x30 PWM1 Duty Cycle = 0x00 (0% default)
Reg. 0x31 PWM2 Duty Cycle = 0x00 (0% default)
Reg. 0x32 PWM3 Duty Cycle = 0x00 (0% default)
calibration. This feature reduces
register is given by
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/0.39
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By reading the PWMx current duty cycle registers, the user can
keep track of the current duty cycle on each PWM output, even
when the fans are running in automatic fan speed control mode
or acoustic enhancement mode. See the Programming the
Automatic Fan Speed Control Loop section for details.

FAN PRESENCE DETECT

This feature can be used to determine if a 4-wire fan is directly
connected to a PWM output. This feature does not work for
3-wire fans. To detect whether a 4-wire fan is connected directly
to a PWM output, the following must be performed in this order:
1. Drive the appropriate PWM outputs to 100% duty
cycle.
2. Set bit 0 of Configuration Register 2 (0x73).
3. Wait 5 ms.
4. Program the fans to run at a different speed if
necessary.
5. Read the state of bits <3:1> of Configuration
Register 2 (0x73). The state of these bits reflects
whether a 4-wire fan is directly connected to the
PWM output.
As the detection time only takes 5ms, programming the PWM
outputs to 100% and then back to its normal speed is not
noticeable in most cases.
Description of How Fan Presence Detect Works
Four-wire fans typically have an internal pull up to 4.75V ±10%,
which typically sources 5 mA. While the detection cycle is on,
an internal current sink is turned on, sinking current from the
fan's internal pull-up. By driving some of the current from the
fan's internal pull-up (~100μA) the logic buffer switches to a
defined logic state. If this state is high, a fan is present; if it is
low, no fan is present.
The PWM input voltage should be clamped to 3.3 V. This
ensures the PWM output is not pulled to a voltage higher than
the max allowable voltage on that pin (3.6 V).

SLEEP STATES

The ADT7473 has been specifically designed to operate from a
3.3 V STBY supply. In computers that support S3 and S5 states,
the core voltage of the processor is lowered in these states. If
using the dynamic T
processor changes the CPU temperature and the dynamics of
the system under dynamic T
monitoring THERM , the THERM timer should be disabled
during these states.
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mode, lowering the core voltage of the
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control. Likewise, when
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